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|
ADC |
 |
3ADCs_DMA |
Use 3ADCs in independant continuous conversion mode
with ADC1 and ADC3 using DMA transfer from ADC1 and ADC3 to data
buffers. |
|
 |
ADC1_DMA |
Use the ADC and DMA to transfer continuously
converted data from ADC to a data buffer. |
|
 |
AnalogWatchdog |
Use the ADC analog watchdog to guard continuously
an ADC channel. |
|
 |
ExtLinesTrigger |
Trigger ADC regular and injected groups channel
conversion using two external line event. |
|
 |
RegSimul_DualMode |
Use ADC1 and ADC2 in regular simultaneous dual mode |
|
 |
ExTIMTrigger_AutoInjection |
Convert ADC regular group channels continuously
using TIM1 external trigger and injected group channels using the
auto-injected feature. |
|
|
|
|
BKP |
 |
Backup_Data |
Store
user data in the Backup data registers. |
|
 |
Tamper |
Write/read data to/from Backup data registers and demonstrates the
Tamper detection feature. |
|
|
|
|
CAN |
 |
Example |
Set a
communication with the bxCAN in loopback mode. |
|
|
|
|
CortexM3 |
 |
BitBand |
Use
CortexM3 Bit-Band access to perform atomic read-modify-write and read
operations on a variable in SRAM. |
|
|
Mode_Privilege |
Modify CortexM3 Thread mode privilege access and
stack. |
|
|
|
|
CRC |
 |
Example |
Use the
CRC calculation unit to get a CRC code of a given buffer of data
word(32-bit). |
|
|
|
|
DAC |
 |
DualModeDMA_SineWave |
Use
DAC channels in dual mode with DMA to generate the same sine wave
signal in 12bit right data alignment mode. |
|
 |
OneChannel_NoiseWave |
Use DAC channel1 to generate a fixed signal with
noise wave in 12bit left data alignment mode. |
|
 |
OneChannelDMA_Escalator |
Use DAC channel1 with DMA to generate an escalator
signal in 8bit right alignment mode |
|
 |
TwoChannels_TriangleWave |
Use DAC channels separately to generate two signals
with different triangle waves in 12bit right data alignment mode. |
|
|
|
|
DMA |
 |
ADC_TIM1 |
Use a DMA channel to transfer continuously a data
from a peripheral (ADC) to another (TIM1) supporting DMA transfer. |
|
 |
FLASH_RAM |
Use a DMA channel to transfer a word data buffer
from memory (Flash) to memory (RAM). |
|
 |
FSMC |
Use two DMA1 channels to transfer a word data
buffer from embedded FLASH to external memory through FSMC and from
this external memory to embedded RAM. |
|
 |
I2C_RAM |
Use two DMA channels to transfer a data buffer from
memory to I2C2 through I2C1. |
|
 |
SPI_RAM |
Use four DMA channels to transfer a data buffer
from memory to SPI2 through SPI1 and a second data buffer from memory
to SPI1 through SPI2 in full-duplex mode. |
|
|
|
|
EXTI |
 |
Example |
Configure an external interrupt line. |
|
|
|
|
FLASH |
 |
Program |
Program the STM32F10x FLASH. |
|
 |
Write_Protection |
Enable and disable the write protection for the
STM32F10x FLASH. |
|
|
|
|
FSMC |
 |
NAND |
Use the FSMC firmware library and an associate
driver to communicate with a 8-Bit NAND memory: NAND512W3A2. Write into
all memory, Read and verify the contents. |
|
 |
NOR |
Use the FSMC firmware library and an associate
driver to communicate with a 16-Bit NOR memory: M29W128FL,
M29W128GL or S29GL128P. Write into all memory, Read
and verify the contents . |
|
 |
NOR_CodeExecute |
Build an application to be loaded into the NOR
memory mounted on STM3210E-EVAL board then execute it from internal
Flash. |
|
 |
SRAM |
Use the FSMC firmware library and an associate
driver to communicate with a 16-Bit SRAM memory: IS61WV51216BLL. Write
into all memory, Read and verify the contents. |
|
 |
SRAM_DataMemory |
Use the external SRAM mounted on STM3210E-EVAL
board as program data memory and internal SRAM for Stack. |
|
|
|
|
GPIO |
 |
IOToggle |
Use the GPIO BSRR (Port bit set/reset register) and
BRR (Port bit reset register) for IO toggling. These registers allow
modifying only one or several GPIO pins in a single atomic write access. |
|
 |
JTAG_Remap |
Use the JTAG IOs as standard GPIOs and gives a
configuration sequence. |
|
|
|
|
I2C |
 |
10bitAddress |
Transfer a data buffer from I2C1 to I2C2 in 10-bit
addressing mode. |
|
 |
DualAddress |
Transfer two data buffer from I2C1 to I2C2 through
its two addresses in the same application. |
|
 |
Interrupt |
Transfer a data buffer from master transmitter
(I2C1) to slave receiver (I2C2) and from slave
transmitter (I2C2) to master receiver (I2C1) using
interrupts. |
|
 |
M24C08_EEPROM |
Use the I2C firmware library and an associate I2C
EEPROM driver to communicate with an M24C08 EEPROM. |
|
 |
SMBus |
Send an ARP command from I2C1 to I2C2 in SMBus mode. |
|
|
|
|
I2S |
 |
Interrupt |
Describe how to configure and use the I2S mode
interrupts with 16bits and 24 bits data in 32 bits packet frames. |
|
 |
SPI_I2S_Switch |
Describe how to configure and use the I2S mode in
alternation with the SPI maode. Simple communication is performed
between two SPIs then between two I2Ss (raw data transfer and
verification). |
|
|
|
|
IWDG |
 |
Example |
Reload at regulate period the IWDG counter using
the SysTick interrupt. |
|
|
|
|
LIB_DEBUG |
 |
Example |
Demonstrates the STM32F10x Firmware Library DEBUG
mode. When the Debug mode is selected, the assert macro is expanded and
run time checking is enabled in the firmware library code. The run-time
checking allows checking that all the library functions input value
lies within the parameter allowed values. |
|
|
|
|
NVIC |
 |
CM3_LPModes |
Use the NVIC firmware library to demonstrate the
Cortex-M3 low power modes capabilities (WFE and WFI). |
|
 |
DMA_WFIMode |
Enter the system to WFI mode with DMA transfer
enabled and wake-up from this mode by the DMA End of Transfer interrupt. |
|
 |
IRQ_Channels |
Use of the Nested Vectored Interrupt Controller
(NVIC) and IRQ Channels configuration. |
|
 |
Priority |
Use of the Nested Vectored Interrupt Controller
(NVIC) and priority mechanism (PreemptionPriority , SubPriority). |
|
 |
System_Handlers |
Use of the Nested Vectored Interrupt Controller
(NVIC) and system handlers. |
|
 |
VectorTable_Relocation |
Use the NVIC firmware library to set the CortexM3
vector table in a specific address other than default. This can be used
to build program which will be loaded into Flash memory by an
application previously programmed in the sector0 of the Flash memory.
Such application can be In-Application Programming (IAP, through USART)
or Device Firmware Upgrade (DFU, through USB). |
|
|
|
|
PWR |
 |
STANDBY |
Enter the system to STANDBY mode and wake-up from
this mode using: external RESET, RTC Alarm or WKUP pin. |
|
 |
STOP |
Enter the system to STOP mode and wake-up using
EXTI Line interrupts. The EXTI Line sources are Key
Button and RTC Alarm. |
|
|
|
|
RCC |
 |
Example |
Configure the system clock source, AHB, APB2 and
APB1 prescaler. It demonstrates also the Clock Security System (CSS)
which handles the High Speed External clock (HSE) failure detection and
system clock back-up. |
|
|
|
|
RTC |
 |
Calendar |
Explain how to use the RTC peripheral. As an
application example, it demonstrates how to setup the RTC peripheral,
in terms of prescaler and interrupts, to be used to keep time and to
generate Second interrupt. |
|
 |
LSI_Calib |
Describe how to use the LSI calibration to get RTC
accurate time base. |
|
|
|
|
SDIO |
 |
Example |
Use the SDIO firmware library and an associate
driver to perform read/write operations on the SD Card memory. |
|
|
|
|
SPI |
 |
CRC |
Set a communication between two SPIs in full-duplex
mode and performs a transfer from Master to Slave and Slave to Master
followed by CRC transmission. |
|
 |
DMA |
Set a communication between the two SPIs in simplex
mode and performs a transfer from Master in polling mode to the Slave
in DMA receive mode. The NSS pin is managed by hardware. |
|
 |
FullDuplex_SoftNSS |
Set a communication between the two SPIs in
full-duplex mode and performs a transfer from Master to Slave and then
Slave to Master in the same application with software NSS management. |
|
 |
M25P64_FLASH |
Use the SPI firmware library and an associated SPI
FLASH driver to communicate with an M25P64 FLASH. |
|
 |
Simplex_Interrupt |
Set a communication between two SPIs in simplex
mode and performs a data buffer transfer from Master to Slave using TxE
interrupt for master and RxNE interrupt for slave. |
|
|
|
|
SysTick |
 |
Example |
Configure the SysTick to generate a time base equal
to 1ms. |
|
|
|
|
TIM |
 |
6Steps |
Configure the TIM1 peripheral to generate 6 Steps. |
|
 |
7PWM_Output |
Configure the TIM1 peripheral to generate 7 PWM
signals with 4 different duty cycles. |
|
 |
Cascade_Synchro |
Synchronize TIM peripherals in cascade mode. |
|
 |
ComplementarySignals |
Configure the TIM1 peripheral to generate three
complementary TIM1 signals, to insert a defined dead time value, to use
the break feature and to lock the desired parameters. |
|
 |
DMA |
Use DMA with TIM1 Update request to transfer Data
from memory to TIM1 Capture Compare Register3. |
|
 |
ExtTrigger_Synchro |
Synchronize TIM peripherals in cascade mode with an
external trigger. |
|
 |
OCActive |
Configure the TIM peripheral to generate four
different signals with four different delays. |
|
 |
OCInactive |
Configure the TIM peripheral in Output Compare
Inactive mode with the corresponding Interrupt requests for each
channel. |
|
 |
OCToggle |
Configure the TIM peripheral to generate four
different signals with four different frequencies. |
|
 |
OnePulse |
Use the TIM peripheral to generate One pulse after
a Rising edge of an external signal is received in Timer Input pin. |
|
 |
Parallel_Synchro |
Synchronize TIM peripherals in parallel mode. |
|
 |
PWM_Input |
Use the TIM peripheral to measure the frequency and
duty cycle of an external signal. |
|
 |
PWM_Output |
Configure the TIM peripheral in PWM (Pulse Width
Modulation) mode. |
|
 |
TIM1_Synchro |
Synchronize TIM1 and Timers (TIM3 and TIM4) in
parallel mode. |
|
 |
TimeBase |
Configure the TIM peripheral in Output Compare
Timing mode with the corresponding Interrupt requests for each channel
in order to generate 4 different time bases. |
|
|
|
|
USART |
 |
DMA_Interrupt |
Provide a basic communication between USART1 and
USART2 using DMA capability, flags and interrupts. |
|
 |
DMA_Polling |
Provide a basic communication between USART1 and
USART2 using DMA capability. |
|
 |
HalfDuplex |
Provide a basic communication between USART1 and
USART2 in Half-Duplex mode using flags. |
|
 |
HyperTerminal_HwFlowControl |
Use the USART with hardware flow control and
communicate with the Hyperterminal. |
|
 |
HyperTerminal_Interrupt |
Use the USART1 interrupts to communicate with the
hyperterminal. |
|
 |
Interrupt |
Provide a basic communication between USART1 and
USART2 using interrupts. |
|
 |
IrDA |
Use IrDA mode. Two projects are provided: one for
IrDA transmitter and the second for IrDA receiver |
|
 |
MultiProcessor |
Use the USART in multi-processor mode. |
|
 |
Polling |
Provide a basic communication between USART1 and
USART2 using flags. |
|
 |
Printf |
Retarget the C library printf function to the
USART. |
|
 |
Smartcard |
Use the USART in Smart Card mode. |
|
 |
Synchronous |
Provide a basic communication between USART1
(Synchronous mode) and SPI1 using flags. |
|
|
|
|
WWDG |
 |
Example |
Update at regulate period the WWDG counter using
the Early Wakeup interrupt (EWI). |