Device Usage Page (usage_statistics_webtalk.html)

This HTML page displays the device usage statistics that will be sent to Xilinx.
 
 
Software Version and Target Device
Product Version: ISE:14.7 (WebPack) - P.20131013 Target Family: Spartan6
OS Platform: NT Target Device: xc6slx16
Project ID (random number) 149502f20f3d4a3a9f1106c04d754440.4E9456CA708748BEAEF63F093499BD17.34 Target Package: ftg256
Registration ID _ Target Speed: -2
Date Generated 2016-10-14T19:37:28 Tool Flow ISE
 
User Environment
OS Name Microsoft Windows 7 , 32-bit OS Release Service Pack 1 (build 7601)
CPU Name Intel(R) Core(TM) i3 CPU M 330 @ 2.13GHz CPU Speed 2128 MHz
OS Name Microsoft Windows 7 , 32-bit OS Release Service Pack 1 (build 7601)
CPU Name Intel(R) Core(TM) i3 CPU M 330 @ 2.13GHz CPU Speed 2128 MHz
 
Device Usage Statistics
Macro StatisticsMiscellaneous StatisticsNet StatisticsSite Usage
Adder Trees=2
  • 10-bit / 4-inputs adder tree=1
  • 8-bit / 5-inputs adder tree=1
 Adders/Subtractors=25
  • 10-bit adder=7
  • 11-bit adder=1
  • 12-bit adder=1
  • 26-bit adder=1
  • 29-bit adder=2
  • 6-bit adder=1
  • 6-bit subtractor=2
  • 7-bit adder=1
  • 7-bit subtractor=1
  • 8-bit subtractor=4
  • 9-bit adder=4
 Comparators=19
  • 10-bit comparator greater=1
  • 29-bit comparator greater=2
  • 32-bit comparator greater=1
  • 32-bit comparator not equal=1
  • 6-bit comparator equal=1
  • 6-bit comparator greater=1
  • 7-bit comparator equal=1
  • 7-bit comparator not equal=1
  • 8-bit comparator greater=8
  • 8-bit comparator lessequal=2
 Counters=13
  • 10-bit up counter=1
  • 16-bit up counter=1
  • 3-bit up counter=2
  • 32-bit up counter=1
  • 4-bit up counter=1
  • 6-bit up counter=1
  • 7-bit up counter=2
  • 8-bit up counter=3
  • 8-bit updown counter=1
 FSMs=3 Multiplexers=75
  • 1-bit 2-to-1 multiplexer=33
  • 1-bit 3-to-1 multiplexer=1
  • 128-bit 2-to-1 multiplexer=2
  • 2-bit 2-to-1 multiplexer=2
  • 26-bit 2-to-1 multiplexer=2
  • 29-bit 2-to-1 multiplexer=2
  • 30-bit 2-to-1 multiplexer=2
  • 6-bit 2-to-1 multiplexer=6
  • 7-bit 2-to-1 multiplexer=3
  • 8-bit 2-to-1 multiplexer=21
  • 9-bit 2-to-1 multiplexer=1
 Registers=598
  • Flip-Flops=598
 		MiscellaneousStatistics
  • AGG_BONDED_IO=54
  • AGG_IO=54
  • AGG_LOCED_IO=53
  • AGG_SLICE=519
  • NUM_BONDED_IOB=54
  • NUM_BSCAN=1
  • NUM_BSFULL=567
  • NUM_BSLUTONLY=607
  • NUM_BSREGONLY=259
  • NUM_BSUSED=1433
  • NUM_BUFG=1
  • NUM_BUFGMUX=4
  • NUM_BUFIO2=1
  • NUM_BUFPLL_MCB=1
  • NUM_IODRP2=2
  • NUM_IODRP2_MCB=22
  • NUM_LOCED_IOB=53
  • NUM_LOGIC_O5ANDO6=177
  • NUM_LOGIC_O5ONLY=158
  • NUM_LOGIC_O6ONLY=694
  • NUM_LUT_RT_DRIVES_CARRY4=13
  • NUM_LUT_RT_DRIVES_FLOP=38
  • NUM_LUT_RT_EXO5=38
  • NUM_LUT_RT_EXO6=13
  • NUM_LUT_RT_O5=18
  • NUM_LUT_RT_O6=158
  • NUM_MCB=1
  • NUM_OSERDES2=48
  • NUM_PLL_ADV=2
  • NUM_RAMB16BWER=2
  • NUM_RAMB8BWER=1
  • NUM_RPM=13
  • NUM_SLICEL=85
  • NUM_SLICEM=41
  • NUM_SLICEX=393
  • NUM_SLICE_CARRY4=85
  • NUM_SLICE_CONTROLSET=106
  • NUM_SLICE_CYINIT=1570
  • NUM_SLICE_F7MUX=15
  • NUM_SLICE_F8MUX=2
  • NUM_SLICE_FF=940
  • NUM_SLICE_LATCH=1
  • NUM_SLICE_UNUSEDCTRL=142
  • NUM_SRL_O5ANDO6=16
  • NUM_SRL_O5ONLY=2
  • NUM_SRL_O6ONLY=76
  • NUM_UNUSABLE_FF_BELS=453
  • Xilinx Core chipscope_icon_v1_06_a, Xilinx CORE Generator 14.7=1
  • Xilinx Core chipscope_ila_v1_05_a, Xilinx CORE Generator 14.7=1
 		NetStatistics
  • NumNets_Active=2299
  • NumNets_Gnd=1
  • NumNets_Vcc=1
  • NumNodesOfType_Active_BOUNCEACROSS=48
  • NumNodesOfType_Active_BOUNCEIN=326
  • NumNodesOfType_Active_BUFGOUT=5
  • NumNodesOfType_Active_BUFHINP2OUT=21
  • NumNodesOfType_Active_BUFIOINP=1
  • NumNodesOfType_Active_CLKPIN=479
  • NumNodesOfType_Active_CLKPINFEED=40
  • NumNodesOfType_Active_CNTRLPIN=643
  • NumNodesOfType_Active_DOUBLE=2663
  • NumNodesOfType_Active_GENERIC=176
  • NumNodesOfType_Active_GENERIC1=21
  • NumNodesOfType_Active_GLOBAL=195
  • NumNodesOfType_Active_INPUT=571
  • NumNodesOfType_Active_IOBIN2OUT=94
  • NumNodesOfType_Active_IOBINPUT=134
  • NumNodesOfType_Active_IOBOUTPUT=197
  • NumNodesOfType_Active_LUTINPUT=4627
  • NumNodesOfType_Active_OUTBOUND=2225
  • NumNodesOfType_Active_OUTPUT=2098
  • NumNodesOfType_Active_PADINPUT=104
  • NumNodesOfType_Active_PADOUTPUT=24
  • NumNodesOfType_Active_PINBOUNCE=1324
  • NumNodesOfType_Active_PINFEED=6006
  • NumNodesOfType_Active_PINFEED2=72
  • NumNodesOfType_Active_QUAD=1725
  • NumNodesOfType_Active_REGINPUT=422
  • NumNodesOfType_Active_SINGLE=3544
  • NumNodesOfType_Gnd_BOUNCEACROSS=5
  • NumNodesOfType_Gnd_BOUNCEIN=100
  • NumNodesOfType_Gnd_CLKPIN=1
  • NumNodesOfType_Gnd_CLKPINFEED=16
  • NumNodesOfType_Gnd_CNTRLPIN=37
  • NumNodesOfType_Gnd_DOUBLE=19
  • NumNodesOfType_Gnd_HGNDOUT=65
  • NumNodesOfType_Gnd_INPUT=374
  • NumNodesOfType_Gnd_IOBIN2OUT=30
  • NumNodesOfType_Gnd_IOBINPUT=220
  • NumNodesOfType_Gnd_LUTINPUT=30
  • NumNodesOfType_Gnd_OUTBOUND=25
  • NumNodesOfType_Gnd_OUTPUT=30
  • NumNodesOfType_Gnd_PINBOUNCE=230
  • NumNodesOfType_Gnd_PINFEED=674
  • NumNodesOfType_Gnd_QUAD=1
  • NumNodesOfType_Gnd_REGINPUT=54
  • NumNodesOfType_Gnd_SINGLE=44
  • NumNodesOfType_Vcc_CNTRLPIN=98
  • NumNodesOfType_Vcc_HVCCOUT=212
  • NumNodesOfType_Vcc_INPUT=174
  • NumNodesOfType_Vcc_IOBIN2OUT=2
  • NumNodesOfType_Vcc_IOBINPUT=4
  • NumNodesOfType_Vcc_KVCCOUT=84
  • NumNodesOfType_Vcc_LUTINPUT=624
  • NumNodesOfType_Vcc_PINBOUNCE=34
  • NumNodesOfType_Vcc_PINFEED=875
  • NumNodesOfType_Vcc_REGINPUT=7
 SiteStatistics
  • BUFG-BUFGMUX=1
  • IOB-IOBM=26
  • IOB-IOBS=28
  • IODRP2-IODELAY2=2
  • IODRP2_MCB-IODELAY2=22
  • OSERDES2-OLOGIC2=48
  • SLICEL-SLICEM=53
  • SLICEX-SLICEL=103
  • SLICEX-SLICEM=75
 		SiteSummary
  • BSCAN=1
  • BSCAN_BSCAN=1
  • BUFG=1
  • BUFGMUX=4
  • BUFGMUX_BUFGMUX=4
  • BUFG_BUFG=1
  • BUFIO2=1
  • BUFIO2_BUFIO2=1
  • BUFPLL_MCB=1
  • BUFPLL_MCB_BUFPLL_MCB=1
  • CARRY4=85
  • FF_SR=133
  • HARD0=9
  • HARD1=18
  • INVERTER=1
  • IOB=54
  • IOB_IMUX=22
  • IOB_INBUF=22
  • IOB_OUTBUF=52
  • IODRP2=2
  • IODRP2_IODRP2=2
  • IODRP2_MCB=22
  • IODRP2_MCB_IODRP2_MCB=22
  • LUT5=391
  • LUT6=1038
  • LUT_OR_MEM5=18
  • LUT_OR_MEM6=96
  • MCB=1
  • MCB_MCB=1
  • NULLMUX=2
  • OSERDES2=48
  • OSERDES2_OSERDES2=48
  • PAD=54
  • PLL_ADV=2
  • PLL_ADV_PLL_ADV=2
  • PULL_OR_KEEP1=5
  • RAMB16BWER=2
  • RAMB16BWER_RAMB16BWER=2
  • RAMB8BWER=1
  • RAMB8BWER_RAMB8BWER=1
  • REG_SR=808
  • SELMUX2_1=17
  • SLICEL=85
  • SLICEM=41
  • SLICEX=393
 
Configuration Data
BSCAN_BSCAN
  • JTAG_CHAIN=[1:1]
  • JTAG_TEST=[0:1]
 BUFGMUX
  • S=[S_INV:4] [S:0]
 BUFGMUX_BUFGMUX
  • CLK_SEL_TYPE=[SYNC:4]
  • DISABLE_ATTR=[LOW:4]
  • S=[S_INV:4] [S:0]
 BUFIO2_BUFIO2
  • DIVIDE=[1:1]
  • DIVIDE_BYPASS=[TRUE:1]
  • I_INVERT=[FALSE:1]
 BUFPLL_MCB_BUFPLL_MCB
  • DIVIDE=[2:1]
  • LOCK_SRC=[LOCK_TO_0:1]
 FF_SR
  • CK=[CK:133] [CK_INV:0]
  • SRINIT=[SRINIT0:102] [SRINIT1:31]
  • SYNC_ATTR=[ASYNC:77] [SYNC:56]
 IOB_INBUF
  • IN_TERM=[NONE:18]
 IOB_OUTBUF
  • DRIVEATTRBOX=[12:3]
  • OUT_TERM=[UNTUNED_50:49]
  • SLEW=[SLOW:3]
  • SUSPEND=[3STATE:52]
 IODRP2
  • IOCLK0=[IOCLK0_INV:0] [IOCLK0:2]
 IODRP2_IODRP2
  • COUNTER_WRAPAROUND=[WRAPAROUND:2]
  • DATA_RATE=[SDR:2]
  • DELAYCHAIN_OSC=[FALSE:2]
  • DELAY_SRC=[IO:2]
  • IDELAY_MODE=[NORMAL:2]
  • IDELAY_TYPE=[DEFAULT:2]
  • IOCLK0=[IOCLK0_INV:0] [IOCLK0:2]
  • IODELAY_CHANGE=[CHANGE_ON_DATA:2]
  • SERDES_MODE=[NONE:2]
  • TEST_GLITCH_FILTER=[FALSE:2]
 IODRP2_MCB
  • IOCLK0=[IOCLK0_INV:0] [IOCLK0:22]
 IODRP2_MCB_IODRP2_MCB
  • DATA_RATE=[SDR:22]
  • IOCLK0=[IOCLK0_INV:0] [IOCLK0:22]
  • SERDES_MODE=[SLAVE:11] [MASTER:11]
 LUT_OR_MEM5
  • CLK=[CLK:18] [CLK_INV:0]
  • LUT_OR_MEM=[RAM:18]
  • RAMMODE=[SRL16:18]
 LUT_OR_MEM6
  • CLK=[CLK:92] [CLK_INV:0]
  • LUT_OR_MEM=[LUT:4] [RAM:92]
  • RAMMODE=[SRL16:51] [SRL32:41]
 MCB
  • P0CMDCLK=[P0CMDCLK_INV:0] [P0CMDCLK:1]
  • P0CMDEN=[P0CMDEN:1] [P0CMDEN_INV:0]
  • P0RDCLK=[P0RDCLK:1] [P0RDCLK_INV:0]
  • P0RDEN=[P0RDEN_INV:0] [P0RDEN:1]
  • P0WRCLK=[P0WRCLK_INV:0] [P0WRCLK:1]
  • P0WREN=[P0WREN_INV:0] [P0WREN:1]
  • P1CMDCLK=[P1CMDCLK_INV:0] [P1CMDCLK:1]
  • P1CMDEN=[P1CMDEN_INV:0] [P1CMDEN:1]
  • P1RDCLK=[P1RDCLK_INV:0] [P1RDCLK:1]
  • P1RDEN=[P1RDEN:1] [P1RDEN_INV:0]
  • P1WRCLK=[P1WRCLK_INV:0] [P1WRCLK:1]
  • P1WREN=[P1WREN:1] [P1WREN_INV:0]
  • P2CLK=[P2CLK:1] [P2CLK_INV:0]
  • P2CMDCLK=[P2CMDCLK_INV:0] [P2CMDCLK:1]
  • P2CMDEN=[P2CMDEN:1] [P2CMDEN_INV:0]
  • P2EN=[P2EN:1] [P2EN_INV:0]
  • P3CLK=[P3CLK:1] [P3CLK_INV:0]
  • P3CMDCLK=[P3CMDCLK:1] [P3CMDCLK_INV:0]
  • P3CMDEN=[P3CMDEN_INV:0] [P3CMDEN:1]
  • P3EN=[P3EN_INV:0] [P3EN:1]
  • P4CLK=[P4CLK_INV:0] [P4CLK:1]
  • P4CMDCLK=[P4CMDCLK:1] [P4CMDCLK_INV:0]
  • P4CMDEN=[P4CMDEN_INV:0] [P4CMDEN:1]
  • P4EN=[P4EN_INV:0] [P4EN:1]
  • P5CLK=[P5CLK_INV:0] [P5CLK:1]
  • P5CMDCLK=[P5CMDCLK:1] [P5CMDCLK_INV:0]
  • P5CMDEN=[P5CMDEN:1] [P5CMDEN_INV:0]
  • P5EN=[P5EN_INV:0] [P5EN:1]
 MCB_MCB
  • ARB_NUM_TIME_SLOTS=[12:1]
  • CAL_BYPASS=[NO:1]
  • CAL_CALIBRATION_MODE=[NOCALIBRATION:1]
  • CAL_CLK_DIV=[1:1]
  • CAL_DELAY=[HALF:1]
  • MEM_ADDR_ORDER=[ROW_BANK_COLUMN:1]
  • MEM_BA_SIZE=[3:1]
  • MEM_BURST_LEN=[8:1]
  • MEM_CAS_LATENCY=[6:1]
  • MEM_CA_SIZE=[10:1]
  • MEM_DDR1_2_ODS=[FULL:1]
  • MEM_DDR2_3_HIGH_TEMP_SR=[NORMAL:1]
  • MEM_DDR2_3_PA_SR=[FULL:1]
  • MEM_DDR2_ADD_LATENCY=[0:1]
  • MEM_DDR2_DIFF_DQS_EN=[YES:1]
  • MEM_DDR2_RTT=[150OHMS:1]
  • MEM_DDR2_WRT_RECOVERY=[5:1]
  • MEM_DDR3_ADD_LATENCY=[OFF:1]
  • MEM_DDR3_AUTO_SR=[ENABLED:1]
  • MEM_DDR3_CAS_LATENCY=[6:1]
  • MEM_DDR3_CAS_WR_LATENCY=[5:1]
  • MEM_DDR3_DYN_WRT_ODT=[OFF:1]
  • MEM_DDR3_ODS=[DIV6:1]
  • MEM_DDR3_RTT=[DIV4:1]
  • MEM_DDR3_WRT_RECOVERY=[6:1]
  • MEM_MDDR_ODS=[FULL:1]
  • MEM_MOBILE_PA_SR=[FULL:1]
  • MEM_MOBILE_TC_SR=[0:1]
  • MEM_RAS_VAL=[14:1]
  • MEM_RA_SIZE=[15:1]
  • MEM_RCD_VAL=[6:1]
  • MEM_RTP_VAL=[4:1]
  • MEM_TYPE=[DDR3:1]
  • MEM_WIDTH=[16:1]
  • MEM_WR_VAL=[6:1]
  • MEM_WTR_VAL=[4:1]
  • P0CMDCLK=[P0CMDCLK_INV:0] [P0CMDCLK:1]
  • P0CMDEN=[P0CMDEN:1] [P0CMDEN_INV:0]
  • P0RDCLK=[P0RDCLK:1] [P0RDCLK_INV:0]
  • P0RDEN=[P0RDEN_INV:0] [P0RDEN:1]
  • P0WRCLK=[P0WRCLK_INV:0] [P0WRCLK:1]
  • P0WREN=[P0WREN_INV:0] [P0WREN:1]
  • P1CMDCLK=[P1CMDCLK_INV:0] [P1CMDCLK:1]
  • P1CMDEN=[P1CMDEN_INV:0] [P1CMDEN:1]
  • P1RDCLK=[P1RDCLK_INV:0] [P1RDCLK:1]
  • P1RDEN=[P1RDEN:1] [P1RDEN_INV:0]
  • P1WRCLK=[P1WRCLK_INV:0] [P1WRCLK:1]
  • P1WREN=[P1WREN:1] [P1WREN_INV:0]
  • P2CLK=[P2CLK:1] [P2CLK_INV:0]
  • P2CMDCLK=[P2CMDCLK_INV:0] [P2CMDCLK:1]
  • P2CMDEN=[P2CMDEN:1] [P2CMDEN_INV:0]
  • P2EN=[P2EN:1] [P2EN_INV:0]
  • P3CLK=[P3CLK:1] [P3CLK_INV:0]
  • P3CMDCLK=[P3CMDCLK:1] [P3CMDCLK_INV:0]
  • P3CMDEN=[P3CMDEN_INV:0] [P3CMDEN:1]
  • P3EN=[P3EN_INV:0] [P3EN:1]
  • P4CLK=[P4CLK_INV:0] [P4CLK:1]
  • P4CMDCLK=[P4CMDCLK:1] [P4CMDCLK_INV:0]
  • P4CMDEN=[P4CMDEN_INV:0] [P4CMDEN:1]
  • P4EN=[P4EN_INV:0] [P4EN:1]
  • P5CLK=[P5CLK_INV:0] [P5CLK:1]
  • P5CMDCLK=[P5CMDCLK:1] [P5CMDCLK_INV:0]
  • P5CMDEN=[P5CMDEN:1] [P5CMDEN_INV:0]
  • P5EN=[P5EN_INV:0] [P5EN:1]
  • PORT_CONFIG=[B128:1]
 OSERDES2
  • CLK0=[CLK0_INV:0] [CLK0:48]
 OSERDES2_OSERDES2
  • BYPASS_GCLK_FF=[TRUE:48]
  • CLK0=[CLK0_INV:0] [CLK0:48]
  • DATA_RATE_OQ=[SDR:48]
  • DATA_RATE_OT=[SDR:48]
  • DATA_WIDTH=[2:48]
  • OUTPUT_MODE=[DIFFERENTIAL:1] [SINGLE_ENDED:47]
  • SERDES_MODE=[SLAVE:3] [MASTER:45]
  • TRAIN_PATTERN=[0:31] [5:16] [15:1]
 PLL_ADV
  • RST=[RST:2] [RST_INV:0]
 PLL_ADV_PLL_ADV
  • BANDWIDTH=[OPTIMIZED:2]
  • CLK_FEEDBACK=[CLKFBOUT:2]
  • COMPENSATION=[INTERNAL:2]
  • PLL_ADD_LEAKAGE=[2:2]
  • PLL_AVDD_COMP_SET=[2:2]
  • PLL_CLAMP_BYPASS=[FALSE:2]
  • PLL_CLAMP_REF_SEL=[1:2]
  • PLL_CLK0MX=[0:2]
  • PLL_CLK1MX=[0:2]
  • PLL_CLK2MX=[0:2]
  • PLL_CLK3MX=[0:2]
  • PLL_CLK4MX=[0:2]
  • PLL_CLK5MX=[0:2]
  • PLL_CLKBURST_CNT=[0:2]
  • PLL_CLKBURST_ENABLE=[TRUE:2]
  • PLL_CLKCNTRL=[0:2]
  • PLL_CLKFBMX=[0:2]
  • PLL_CLKFBOUT2_EDGE=[TRUE:2]
  • PLL_CLKFBOUT2_NOCOUNT=[TRUE:2]
  • PLL_CLKFBOUT_EDGE=[TRUE:2]
  • PLL_CLKFBOUT_EN=[FALSE:2]
  • PLL_CLKFBOUT_NOCOUNT=[TRUE:2]
  • PLL_CLKOUT0_EDGE=[TRUE:2]
  • PLL_CLKOUT0_EN=[FALSE:2]
  • PLL_CLKOUT0_NOCOUNT=[TRUE:2]
  • PLL_CLKOUT1_EDGE=[TRUE:2]
  • PLL_CLKOUT1_EN=[FALSE:2]
  • PLL_CLKOUT1_NOCOUNT=[TRUE:2]
  • PLL_CLKOUT2_EDGE=[TRUE:2]
  • PLL_CLKOUT2_EN=[FALSE:2]
  • PLL_CLKOUT2_NOCOUNT=[TRUE:2]
  • PLL_CLKOUT3_EDGE=[TRUE:2]
  • PLL_CLKOUT3_EN=[FALSE:2]
  • PLL_CLKOUT3_NOCOUNT=[TRUE:2]
  • PLL_CLKOUT4_EDGE=[TRUE:2]
  • PLL_CLKOUT4_EN=[FALSE:2]
  • PLL_CLKOUT4_NOCOUNT=[TRUE:2]
  • PLL_CLKOUT5_EDGE=[TRUE:2]
  • PLL_CLKOUT5_EN=[FALSE:2]
  • PLL_CLKOUT5_NOCOUNT=[TRUE:2]
  • PLL_CLK_LOST_DETECT=[FALSE:2]
  • PLL_CP=[1:2]
  • PLL_CP_BIAS_TRIP_SHIFT=[TRUE:2]
  • PLL_CP_REPL=[1:2]
  • PLL_CP_RES=[0:2]
  • PLL_DIRECT_PATH_CNTRL=[TRUE:2]
  • PLL_DIVCLK_EDGE=[TRUE:2]
  • PLL_DIVCLK_NOCOUNT=[TRUE:2]
  • PLL_DVDD_COMP_SET=[2:2]
  • PLL_EN=[FALSE:2]
  • PLL_EN_DLY=[TRUE:2]
  • PLL_EN_LEAKAGE=[2:2]
  • PLL_EN_TCLK0=[TRUE:2]
  • PLL_EN_TCLK1=[TRUE:2]
  • PLL_EN_TCLK2=[TRUE:2]
  • PLL_EN_TCLK3=[TRUE:2]
  • PLL_EN_VCO0=[FALSE:2]
  • PLL_EN_VCO1=[FALSE:2]
  • PLL_EN_VCO2=[FALSE:2]
  • PLL_EN_VCO3=[FALSE:2]
  • PLL_EN_VCO4=[FALSE:2]
  • PLL_EN_VCO5=[FALSE:2]
  • PLL_EN_VCO6=[FALSE:2]
  • PLL_EN_VCO7=[FALSE:2]
  • PLL_EN_VCO_DIV1=[FALSE:2]
  • PLL_EN_VCO_DIV6=[TRUE:2]
  • PLL_INTFB=[0:2]
  • PLL_IO_CLKSRC=[0:2]
  • PLL_LFHF=[3:2]
  • PLL_LOCK_FB_DLY=[3:2]
  • PLL_LOCK_REF_DLY=[5:2]
  • PLL_MAN_LF_EN=[TRUE:2]
  • PLL_NBTI_EN=[TRUE:2]
  • PLL_PFD_CNTRL=[8:2]
  • PLL_PFD_DLY=[1:2]
  • PLL_PWRD_CFG=[FALSE:2]
  • PLL_REG_INPUT=[TRUE:2]
  • PLL_RES=[1:2]
  • PLL_SEL_SLIPD=[FALSE:2]
  • PLL_SKEW_CNTRL=[0:2]
  • PLL_TEST_IN_WINDOW=[FALSE:2]
  • PLL_VDD_SEL=[0:2]
  • PLL_VLFHIGH_DIS=[TRUE:2]
  • RST=[RST:2] [RST_INV:0]
 PULL_OR_KEEP1
  • PULLTYPE=[PULLUP:3] [PULLDOWN:2]
 RAMB16BWER
  • CLKA=[CLKA_INV:0] [CLKA:2]
  • CLKB=[CLKB_INV:0] [CLKB:2]
  • ENA=[ENA_INV:0] [ENA:2]
  • ENB=[ENB_INV:0] [ENB:2]
  • REGCEA=[REGCEA_INV:0] [REGCEA:2]
  • REGCEB=[REGCEB_INV:0] [REGCEB:2]
  • RSTA=[RSTA:2] [RSTA_INV:0]
  • RSTB=[RSTB:2] [RSTB_INV:0]
  • WEA0=[WEA0:2] [WEA0_INV:0]
  • WEA1=[WEA1:2] [WEA1_INV:0]
  • WEA2=[WEA2:2] [WEA2_INV:0]
  • WEA3=[WEA3_INV:0] [WEA3:2]
  • WEB0=[WEB0:2] [WEB0_INV:0]
  • WEB1=[WEB1:2] [WEB1_INV:0]
  • WEB2=[WEB2_INV:0] [WEB2:2]
  • WEB3=[WEB3:2] [WEB3_INV:0]
 RAMB16BWER_RAMB16BWER
  • CLKA=[CLKA_INV:0] [CLKA:2]
  • CLKB=[CLKB_INV:0] [CLKB:2]
  • DATA_WIDTH_A=[18:2]
  • DATA_WIDTH_B=[18:2]
  • DOA_REG=[0:2]
  • DOB_REG=[0:2]
  • ENA=[ENA_INV:0] [ENA:2]
  • ENB=[ENB_INV:0] [ENB:2]
  • EN_RSTRAM_A=[FALSE:2]
  • EN_RSTRAM_B=[FALSE:2]
  • RAM_MODE=[TDP:2]
  • REGCEA=[REGCEA_INV:0] [REGCEA:2]
  • REGCEB=[REGCEB_INV:0] [REGCEB:2]
  • RSTA=[RSTA:2] [RSTA_INV:0]
  • RSTB=[RSTB:2] [RSTB_INV:0]
  • RSTTYPE=[SYNC:2]
  • RST_PRIORITY_A=[CE:2]
  • RST_PRIORITY_B=[CE:2]
  • WEA0=[WEA0:2] [WEA0_INV:0]
  • WEA1=[WEA1:2] [WEA1_INV:0]
  • WEA2=[WEA2:2] [WEA2_INV:0]
  • WEA3=[WEA3_INV:0] [WEA3:2]
  • WEB0=[WEB0:2] [WEB0_INV:0]
  • WEB1=[WEB1:2] [WEB1_INV:0]
  • WEB2=[WEB2_INV:0] [WEB2:2]
  • WEB3=[WEB3:2] [WEB3_INV:0]
  • WRITE_MODE_A=[WRITE_FIRST:2]
  • WRITE_MODE_B=[WRITE_FIRST:2]
 RAMB8BWER
  • CLKAWRCLK=[CLKAWRCLK:1] [CLKAWRCLK_INV:0]
  • CLKBRDCLK=[CLKBRDCLK_INV:0] [CLKBRDCLK:1]
  • ENAWREN=[ENAWREN:1] [ENAWREN_INV:0]
  • ENBRDEN=[ENBRDEN_INV:0] [ENBRDEN:1]
  • REGCEA=[REGCEA_INV:0] [REGCEA:1]
  • REGCEBREGCE=[REGCEBREGCE_INV:0] [REGCEBREGCE:1]
  • RSTA=[RSTA:1] [RSTA_INV:0]
  • RSTBRST=[RSTBRST:1] [RSTBRST_INV:0]
  • WEAWEL0=[WEAWEL0:1] [WEAWEL0_INV:0]
  • WEAWEL1=[WEAWEL1_INV:0] [WEAWEL1:1]
  • WEBWEU0=[WEBWEU0:1] [WEBWEU0_INV:0]
  • WEBWEU1=[WEBWEU1:1] [WEBWEU1_INV:0]
 RAMB8BWER_RAMB8BWER
  • CLKAWRCLK=[CLKAWRCLK:1] [CLKAWRCLK_INV:0]
  • CLKBRDCLK=[CLKBRDCLK_INV:0] [CLKBRDCLK:1]
  • DATA_WIDTH_A=[9:1]
  • DATA_WIDTH_B=[9:1]
  • DOA_REG=[0:1]
  • DOB_REG=[0:1]
  • ENAWREN=[ENAWREN:1] [ENAWREN_INV:0]
  • ENBRDEN=[ENBRDEN_INV:0] [ENBRDEN:1]
  • EN_RSTRAM_A=[FALSE:1]
  • EN_RSTRAM_B=[FALSE:1]
  • RAM_MODE=[TDP:1]
  • REGCEA=[REGCEA_INV:0] [REGCEA:1]
  • REGCEBREGCE=[REGCEBREGCE_INV:0] [REGCEBREGCE:1]
  • RSTA=[RSTA:1] [RSTA_INV:0]
  • RSTBRST=[RSTBRST:1] [RSTBRST_INV:0]
  • RSTTYPE=[SYNC:1]
  • RST_PRIORITY_A=[CE:1]
  • RST_PRIORITY_B=[CE:1]
  • WEAWEL0=[WEAWEL0:1] [WEAWEL0_INV:0]
  • WEAWEL1=[WEAWEL1_INV:0] [WEAWEL1:1]
  • WEBWEU0=[WEBWEU0:1] [WEBWEU0_INV:0]
  • WEBWEU1=[WEBWEU1:1] [WEBWEU1_INV:0]
  • WRITE_MODE_A=[WRITE_FIRST:1]
  • WRITE_MODE_B=[WRITE_FIRST:1]
 REG_SR
  • CK=[CK:807] [CK_INV:1]
  • LATCH_OR_FF=[FF:807] [LATCH:1]
  • SRINIT=[SRINIT0:696] [SRINIT1:112]
  • SYNC_ATTR=[ASYNC:336] [SYNC:472]
 SLICEL
  • CLK=[CLK:41] [CLK_INV:0]
 SLICEM
  • CLK=[CLK:41] [CLK_INV:0]
 SLICEX
  • CLK=[CLK:294] [CLK_INV:1]
 
Pin Data
BSCAN
  • DRCK=1
  • SEL=1
  • SHIFT=1
  • TDI=1
  • TDO=1
  • UPDATE=1
 BSCAN_BSCAN
  • DRCK=1
  • SEL=1
  • SHIFT=1
  • TDI=1
  • TDO=1
  • UPDATE=1
 BUFG
  • I0=1
  • O=1
 BUFGMUX
  • I0=4
  • I1=4
  • O=4
  • S=4
 BUFGMUX_BUFGMUX
  • I0=4
  • I1=4
  • O=4
  • S=4
 BUFG_BUFG
  • I0=1
  • O=1
 BUFIO2
  • DIVCLK=1
  • I=1
 BUFIO2_BUFIO2
  • DIVCLK=1
  • I=1
 BUFPLL_MCB
  • GCLK=1
  • IOCLK0=1
  • IOCLK1=1
  • LOCK=1
  • LOCKED=1
  • PLLIN0=1
  • PLLIN1=1
  • SERDESSTROBE0=1
  • SERDESSTROBE1=1
 BUFPLL_MCB_BUFPLL_MCB
  • GCLK=1
  • IOCLK0=1
  • IOCLK1=1
  • LOCK=1
  • LOCKED=1
  • PLLIN0=1
  • PLLIN1=1
  • SERDESSTROBE0=1
  • SERDESSTROBE1=1
 CARRY4
  • CIN=56
  • CO0=8
  • CO1=2
  • CO3=56
  • CYINIT=29
  • DI0=76
  • DI1=66
  • DI2=64
  • DI3=56
  • O0=61
  • O1=60
  • O2=50
  • O3=50
  • S0=85
  • S1=76
  • S2=64
  • S3=64
 FF_SR
  • CE=22
  • CK=133
  • D=133
  • Q=133
  • SR=104
 HARD0
  • 0=9
 HARD1
  • 1=18
 INVERTER
  • IN=1
  • OUT=1
 IOB
  • DIFFI_IN=2
  • I=22
  • O=52
  • PAD=54
  • PADOUT=2
  • T=50
 IOB_IMUX
  • I=21
  • I_B=1
  • OUT=22
 IOB_INBUF
  • DIFFI_IN=2
  • OUT=22
  • PAD=22
 IOB_OUTBUF
  • IN=52
  • OUT=52
  • TRI=50
 IODRP2
  • ADD=2
  • BKST=2
  • CLK=2
  • CS=2
  • DOUT=2
  • IDATAIN=2
  • IOCLK0=2
  • ODATAIN=2
  • SDI=2
  • SDO=2
  • T=2
  • TOUT=2
 IODRP2_IODRP2
  • ADD=2
  • BKST=2
  • CLK=2
  • CS=2
  • DOUT=2
  • IDATAIN=2
  • IOCLK0=2
  • ODATAIN=2
  • SDI=2
  • SDO=2
  • T=2
  • TOUT=2
 IODRP2_MCB
  • ADD=22
  • AUXADDR0=22
  • AUXADDR1=22
  • AUXADDR2=22
  • AUXADDR3=22
  • AUXADDR4=22
  • AUXSDO=22
  • AUXSDOIN=21
  • BKST=22
  • CLK=22
  • CS=22
  • DOUT=22
  • DQSOUTP=20
  • IDATAIN=20
  • IOCLK0=22
  • MEMUPDATE=22
  • ODATAIN=22
  • SDI=22
  • T=22
  • TOUT=22
 IODRP2_MCB_IODRP2_MCB
  • ADD=22
  • AUXADDR0=22
  • AUXADDR1=22
  • AUXADDR2=22
  • AUXADDR3=22
  • AUXADDR4=22
  • AUXSDO=22
  • AUXSDOIN=21
  • BKST=22
  • CLK=22
  • CS=22
  • DOUT=22
  • DQSOUTP=20
  • IDATAIN=20
  • IOCLK0=22
  • MEMUPDATE=22
  • ODATAIN=22
  • SDI=22
  • T=22
  • TOUT=22
 LUT5
  • A1=59
  • A2=95
  • A3=131
  • A4=159
  • A5=102
  • O5=391
 LUT6
  • A1=400
  • A2=564
  • A3=717
  • A4=872
  • A5=929
  • A6=1016
  • O6=1038
 LUT_OR_MEM5
  • A1=18
  • A2=18
  • A3=18
  • A4=18
  • A5=18
  • CLK=18
  • DI1=18
  • O5=18
  • WE=18
 LUT_OR_MEM6
  • A1=94
  • A2=96
  • A3=96
  • A4=96
  • A5=96
  • A6=96
  • CLK=92
  • DI1=41
  • DI2=51
  • MC31=65
  • O6=96
  • WE=92
 MCB
  • ADDR0=1
  • ADDR1=1
  • ADDR10=1
  • ADDR11=1
  • ADDR12=1
  • ADDR13=1
  • ADDR14=1
  • ADDR2=1
  • ADDR3=1
  • ADDR4=1
  • ADDR5=1
  • ADDR6=1
  • ADDR7=1
  • ADDR8=1
  • ADDR9=1
  • BA0=1
  • BA1=1
  • BA2=1
  • CAS=1
  • CKE=1
  • DQI0=1
  • DQI1=1
  • DQI10=1
  • DQI11=1
  • DQI12=1
  • DQI13=1
  • DQI14=1
  • DQI15=1
  • DQI2=1
  • DQI3=1
  • DQI4=1
  • DQI5=1
  • DQI6=1
  • DQI7=1
  • DQI8=1
  • DQI9=1
  • DQIOWEN0=1
  • DQON0=1
  • DQON1=1
  • DQON10=1
  • DQON11=1
  • DQON12=1
  • DQON13=1
  • DQON14=1
  • DQON15=1
  • DQON2=1
  • DQON3=1
  • DQON4=1
  • DQON5=1
  • DQON6=1
  • DQON7=1
  • DQON8=1
  • DQON9=1
  • DQOP0=1
  • DQOP1=1
  • DQOP10=1
  • DQOP11=1
  • DQOP12=1
  • DQOP13=1
  • DQOP14=1
  • DQOP15=1
  • DQOP2=1
  • DQOP3=1
  • DQOP4=1
  • DQOP5=1
  • DQOP6=1
  • DQOP7=1
  • DQOP8=1
  • DQOP9=1
  • DQSIOIN=1
  • DQSIOIP=1
  • DQSIOWEN90N=1
  • DQSIOWEN90P=1
  • IOIDRPADD=1
  • IOIDRPADDR0=1
  • IOIDRPADDR1=1
  • IOIDRPADDR2=1
  • IOIDRPADDR3=1
  • IOIDRPADDR4=1
  • IOIDRPBROADCAST=1
  • IOIDRPCLK=1
  • IOIDRPCS=1
  • IOIDRPSDI=1
  • IOIDRPSDO=1
  • IOIDRPTRAIN=1
  • IOIDRPUPDATE=1
  • LDMN=1
  • LDMP=1
  • ODT=1
  • P0ARBEN=1
  • P0CMDBA0=1
  • P0CMDBA1=1
  • P0CMDBA2=1
  • P0CMDBL0=1
  • P0CMDBL1=1
  • P0CMDBL2=1
  • P0CMDBL3=1
  • P0CMDBL4=1
  • P0CMDBL5=1
  • P0CMDCA0=1
  • P0CMDCA1=1
  • P0CMDCA10=1
  • P0CMDCA11=1
  • P0CMDCA2=1
  • P0CMDCA3=1
  • P0CMDCA4=1
  • P0CMDCA5=1
  • P0CMDCA6=1
  • P0CMDCA7=1
  • P0CMDCA8=1
  • P0CMDCA9=1
  • P0CMDCLK=1
  • P0CMDEN=1
  • P0CMDINSTR0=1
  • P0CMDINSTR1=1
  • P0CMDINSTR2=1
  • P0CMDRA0=1
  • P0CMDRA1=1
  • P0CMDRA10=1
  • P0CMDRA11=1
  • P0CMDRA12=1
  • P0CMDRA13=1
  • P0CMDRA14=1
  • P0CMDRA2=1
  • P0CMDRA3=1
  • P0CMDRA4=1
  • P0CMDRA5=1
  • P0CMDRA6=1
  • P0CMDRA7=1
  • P0CMDRA8=1
  • P0CMDRA9=1
  • P0RDCLK=1
  • P0RDDATA0=1
  • P0RDDATA1=1
  • P0RDDATA10=1
  • P0RDDATA11=1
  • P0RDDATA12=1
  • P0RDDATA13=1
  • P0RDDATA14=1
  • P0RDDATA15=1
  • P0RDDATA16=1
  • P0RDDATA17=1
  • P0RDDATA18=1
  • P0RDDATA19=1
  • P0RDDATA2=1
  • P0RDDATA20=1
  • P0RDDATA21=1
  • P0RDDATA22=1
  • P0RDDATA23=1
  • P0RDDATA24=1
  • P0RDDATA25=1
  • P0RDDATA26=1
  • P0RDDATA27=1
  • P0RDDATA28=1
  • P0RDDATA29=1
  • P0RDDATA3=1
  • P0RDDATA30=1
  • P0RDDATA31=1
  • P0RDDATA4=1
  • P0RDDATA5=1
  • P0RDDATA6=1
  • P0RDDATA7=1
  • P0RDDATA8=1
  • P0RDDATA9=1
  • P0RDEN=1
  • P0RWRMASK0=1
  • P0RWRMASK1=1
  • P0RWRMASK2=1
  • P0RWRMASK3=1
  • P0WRCLK=1
  • P0WRDATA0=1
  • P0WRDATA1=1
  • P0WRDATA10=1
  • P0WRDATA11=1
  • P0WRDATA12=1
  • P0WRDATA13=1
  • P0WRDATA14=1
  • P0WRDATA15=1
  • P0WRDATA16=1
  • P0WRDATA17=1
  • P0WRDATA18=1
  • P0WRDATA19=1
  • P0WRDATA2=1
  • P0WRDATA20=1
  • P0WRDATA21=1
  • P0WRDATA22=1
  • P0WRDATA23=1
  • P0WRDATA24=1
  • P0WRDATA25=1
  • P0WRDATA26=1
  • P0WRDATA27=1
  • P0WRDATA28=1
  • P0WRDATA29=1
  • P0WRDATA3=1
  • P0WRDATA30=1
  • P0WRDATA31=1
  • P0WRDATA4=1
  • P0WRDATA5=1
  • P0WRDATA6=1
  • P0WRDATA7=1
  • P0WRDATA8=1
  • P0WRDATA9=1
  • P0WREN=1
  • P1ARBEN=1
  • P1CMDBA0=1
  • P1CMDBA1=1
  • P1CMDBA2=1
  • P1CMDBL0=1
  • P1CMDBL1=1
  • P1CMDBL2=1
  • P1CMDBL3=1
  • P1CMDBL4=1
  • P1CMDBL5=1
  • P1CMDCA0=1
  • P1CMDCA1=1
  • P1CMDCA10=1
  • P1CMDCA11=1
  • P1CMDCA2=1
  • P1CMDCA3=1
  • P1CMDCA4=1
  • P1CMDCA5=1
  • P1CMDCA6=1
  • P1CMDCA7=1
  • P1CMDCA8=1
  • P1CMDCA9=1
  • P1CMDCLK=1
  • P1CMDEN=1
  • P1CMDINSTR0=1
  • P1CMDINSTR1=1
  • P1CMDINSTR2=1
  • P1CMDRA0=1
  • P1CMDRA1=1
  • P1CMDRA10=1
  • P1CMDRA11=1
  • P1CMDRA12=1
  • P1CMDRA13=1
  • P1CMDRA14=1
  • P1CMDRA2=1
  • P1CMDRA3=1
  • P1CMDRA4=1
  • P1CMDRA5=1
  • P1CMDRA6=1
  • P1CMDRA7=1
  • P1CMDRA8=1
  • P1CMDRA9=1
  • P1RDCLK=1
  • P1RDDATA0=1
  • P1RDDATA1=1
  • P1RDDATA10=1
  • P1RDDATA11=1
  • P1RDDATA12=1
  • P1RDDATA13=1
  • P1RDDATA14=1
  • P1RDDATA15=1
  • P1RDDATA16=1
  • P1RDDATA17=1
  • P1RDDATA18=1
  • P1RDDATA19=1
  • P1RDDATA2=1
  • P1RDDATA20=1
  • P1RDDATA21=1
  • P1RDDATA22=1
  • P1RDDATA23=1
  • P1RDDATA24=1
  • P1RDDATA25=1
  • P1RDDATA26=1
  • P1RDDATA27=1
  • P1RDDATA28=1
  • P1RDDATA29=1
  • P1RDDATA3=1
  • P1RDDATA30=1
  • P1RDDATA31=1
  • P1RDDATA4=1
  • P1RDDATA5=1
  • P1RDDATA6=1
  • P1RDDATA7=1
  • P1RDDATA8=1
  • P1RDDATA9=1
  • P1RDEN=1
  • P1RWRMASK0=1
  • P1RWRMASK1=1
  • P1RWRMASK2=1
  • P1RWRMASK3=1
  • P1WRCLK=1
  • P1WRDATA0=1
  • P1WRDATA1=1
  • P1WRDATA10=1
  • P1WRDATA11=1
  • P1WRDATA12=1
  • P1WRDATA13=1
  • P1WRDATA14=1
  • P1WRDATA15=1
  • P1WRDATA16=1
  • P1WRDATA17=1
  • P1WRDATA18=1
  • P1WRDATA19=1
  • P1WRDATA2=1
  • P1WRDATA20=1
  • P1WRDATA21=1
  • P1WRDATA22=1
  • P1WRDATA23=1
  • P1WRDATA24=1
  • P1WRDATA25=1
  • P1WRDATA26=1
  • P1WRDATA27=1
  • P1WRDATA28=1
  • P1WRDATA29=1
  • P1WRDATA3=1
  • P1WRDATA30=1
  • P1WRDATA31=1
  • P1WRDATA4=1
  • P1WRDATA5=1
  • P1WRDATA6=1
  • P1WRDATA7=1
  • P1WRDATA8=1
  • P1WRDATA9=1
  • P1WREN=1
  • P2ARBEN=1
  • P2CLK=1
  • P2CMDBA0=1
  • P2CMDBA1=1
  • P2CMDBA2=1
  • P2CMDBL0=1
  • P2CMDBL1=1
  • P2CMDBL2=1
  • P2CMDBL3=1
  • P2CMDBL4=1
  • P2CMDBL5=1
  • P2CMDCA0=1
  • P2CMDCA1=1
  • P2CMDCA10=1
  • P2CMDCA11=1
  • P2CMDCA2=1
  • P2CMDCA3=1
  • P2CMDCA4=1
  • P2CMDCA5=1
  • P2CMDCA6=1
  • P2CMDCA7=1
  • P2CMDCA8=1
  • P2CMDCA9=1
  • P2CMDCLK=1
  • P2CMDEN=1
  • P2CMDINSTR0=1
  • P2CMDINSTR1=1
  • P2CMDINSTR2=1
  • P2CMDRA0=1
  • P2CMDRA1=1
  • P2CMDRA10=1
  • P2CMDRA11=1
  • P2CMDRA12=1
  • P2CMDRA13=1
  • P2CMDRA14=1
  • P2CMDRA2=1
  • P2CMDRA3=1
  • P2CMDRA4=1
  • P2CMDRA5=1
  • P2CMDRA6=1
  • P2CMDRA7=1
  • P2CMDRA8=1
  • P2CMDRA9=1
  • P2EN=1
  • P2RDDATA0=1
  • P2RDDATA1=1
  • P2RDDATA10=1
  • P2RDDATA11=1
  • P2RDDATA12=1
  • P2RDDATA13=1
  • P2RDDATA14=1
  • P2RDDATA15=1
  • P2RDDATA16=1
  • P2RDDATA17=1
  • P2RDDATA18=1
  • P2RDDATA19=1
  • P2RDDATA2=1
  • P2RDDATA20=1
  • P2RDDATA21=1
  • P2RDDATA22=1
  • P2RDDATA23=1
  • P2RDDATA24=1
  • P2RDDATA25=1
  • P2RDDATA26=1
  • P2RDDATA27=1
  • P2RDDATA28=1
  • P2RDDATA29=1
  • P2RDDATA3=1
  • P2RDDATA30=1
  • P2RDDATA31=1
  • P2RDDATA4=1
  • P2RDDATA5=1
  • P2RDDATA6=1
  • P2RDDATA7=1
  • P2RDDATA8=1
  • P2RDDATA9=1
  • P2WRDATA0=1
  • P2WRDATA1=1
  • P2WRDATA10=1
  • P2WRDATA11=1
  • P2WRDATA12=1
  • P2WRDATA13=1
  • P2WRDATA14=1
  • P2WRDATA15=1
  • P2WRDATA16=1
  • P2WRDATA17=1
  • P2WRDATA18=1
  • P2WRDATA19=1
  • P2WRDATA2=1
  • P2WRDATA20=1
  • P2WRDATA21=1
  • P2WRDATA22=1
  • P2WRDATA23=1
  • P2WRDATA24=1
  • P2WRDATA25=1
  • P2WRDATA26=1
  • P2WRDATA27=1
  • P2WRDATA28=1
  • P2WRDATA29=1
  • P2WRDATA3=1
  • P2WRDATA30=1
  • P2WRDATA31=1
  • P2WRDATA4=1
  • P2WRDATA5=1
  • P2WRDATA6=1
  • P2WRDATA7=1
  • P2WRDATA8=1
  • P2WRDATA9=1
  • P2WRMASK0=1
  • P2WRMASK1=1
  • P2WRMASK2=1
  • P2WRMASK3=1
  • P3ARBEN=1
  • P3CLK=1
  • P3CMDBA0=1
  • P3CMDBA1=1
  • P3CMDBA2=1
  • P3CMDBL0=1
  • P3CMDBL1=1
  • P3CMDBL2=1
  • P3CMDBL3=1
  • P3CMDBL4=1
  • P3CMDBL5=1
  • P3CMDCA0=1
  • P3CMDCA1=1
  • P3CMDCA10=1
  • P3CMDCA11=1
  • P3CMDCA2=1
  • P3CMDCA3=1
  • P3CMDCA4=1
  • P3CMDCA5=1
  • P3CMDCA6=1
  • P3CMDCA7=1
  • P3CMDCA8=1
  • P3CMDCA9=1
  • P3CMDCLK=1
  • P3CMDEN=1
  • P3CMDINSTR0=1
  • P3CMDINSTR1=1
  • P3CMDINSTR2=1
  • P3CMDRA0=1
  • P3CMDRA1=1
  • P3CMDRA10=1
  • P3CMDRA11=1
  • P3CMDRA12=1
  • P3CMDRA13=1
  • P3CMDRA14=1
  • P3CMDRA2=1
  • P3CMDRA3=1
  • P3CMDRA4=1
  • P3CMDRA5=1
  • P3CMDRA6=1
  • P3CMDRA7=1
  • P3CMDRA8=1
  • P3CMDRA9=1
  • P3EN=1
  • P3WRDATA0=1
  • P3WRDATA1=1
  • P3WRDATA10=1
  • P3WRDATA11=1
  • P3WRDATA12=1
  • P3WRDATA13=1
  • P3WRDATA14=1
  • P3WRDATA15=1
  • P3WRDATA16=1
  • P3WRDATA17=1
  • P3WRDATA18=1
  • P3WRDATA19=1
  • P3WRDATA2=1
  • P3WRDATA20=1
  • P3WRDATA21=1
  • P3WRDATA22=1
  • P3WRDATA23=1
  • P3WRDATA24=1
  • P3WRDATA25=1
  • P3WRDATA26=1
  • P3WRDATA27=1
  • P3WRDATA28=1
  • P3WRDATA29=1
  • P3WRDATA3=1
  • P3WRDATA30=1
  • P3WRDATA31=1
  • P3WRDATA4=1
  • P3WRDATA5=1
  • P3WRDATA6=1
  • P3WRDATA7=1
  • P3WRDATA8=1
  • P3WRDATA9=1
  • P3WRMASK0=1
  • P3WRMASK1=1
  • P3WRMASK2=1
  • P3WRMASK3=1
  • P4ARBEN=1
  • P4CLK=1
  • P4CMDBA0=1
  • P4CMDBA1=1
  • P4CMDBA2=1
  • P4CMDBL0=1
  • P4CMDBL1=1
  • P4CMDBL2=1
  • P4CMDBL3=1
  • P4CMDBL4=1
  • P4CMDBL5=1
  • P4CMDCA0=1
  • P4CMDCA1=1
  • P4CMDCA10=1
  • P4CMDCA11=1
  • P4CMDCA2=1
  • P4CMDCA3=1
  • P4CMDCA4=1
  • P4CMDCA5=1
  • P4CMDCA6=1
  • P4CMDCA7=1
  • P4CMDCA8=1
  • P4CMDCA9=1
  • P4CMDCLK=1
  • P4CMDEN=1
  • P4CMDINSTR0=1
  • P4CMDINSTR1=1
  • P4CMDINSTR2=1
  • P4CMDRA0=1
  • P4CMDRA1=1
  • P4CMDRA10=1
  • P4CMDRA11=1
  • P4CMDRA12=1
  • P4CMDRA13=1
  • P4CMDRA14=1
  • P4CMDRA2=1
  • P4CMDRA3=1
  • P4CMDRA4=1
  • P4CMDRA5=1
  • P4CMDRA6=1
  • P4CMDRA7=1
  • P4CMDRA8=1
  • P4CMDRA9=1
  • P4EMPTY=1
  • P4EN=1
  • P4RDDATA0=1
  • P4RDDATA1=1
  • P4RDDATA10=1
  • P4RDDATA11=1
  • P4RDDATA12=1
  • P4RDDATA13=1
  • P4RDDATA14=1
  • P4RDDATA15=1
  • P4RDDATA16=1
  • P4RDDATA17=1
  • P4RDDATA18=1
  • P4RDDATA19=1
  • P4RDDATA2=1
  • P4RDDATA20=1
  • P4RDDATA21=1
  • P4RDDATA22=1
  • P4RDDATA23=1
  • P4RDDATA24=1
  • P4RDDATA25=1
  • P4RDDATA26=1
  • P4RDDATA27=1
  • P4RDDATA28=1
  • P4RDDATA29=1
  • P4RDDATA3=1
  • P4RDDATA30=1
  • P4RDDATA31=1
  • P4RDDATA4=1
  • P4RDDATA5=1
  • P4RDDATA6=1
  • P4RDDATA7=1
  • P4RDDATA8=1
  • P4RDDATA9=1
  • P4WRDATA0=1
  • P4WRDATA1=1
  • P4WRDATA10=1
  • P4WRDATA11=1
  • P4WRDATA12=1
  • P4WRDATA13=1
  • P4WRDATA14=1
  • P4WRDATA15=1
  • P4WRDATA16=1
  • P4WRDATA17=1
  • P4WRDATA18=1
  • P4WRDATA19=1
  • P4WRDATA2=1
  • P4WRDATA20=1
  • P4WRDATA21=1
  • P4WRDATA22=1
  • P4WRDATA23=1
  • P4WRDATA24=1
  • P4WRDATA25=1
  • P4WRDATA26=1
  • P4WRDATA27=1
  • P4WRDATA28=1
  • P4WRDATA29=1
  • P4WRDATA3=1
  • P4WRDATA30=1
  • P4WRDATA31=1
  • P4WRDATA4=1
  • P4WRDATA5=1
  • P4WRDATA6=1
  • P4WRDATA7=1
  • P4WRDATA8=1
  • P4WRDATA9=1
  • P4WRMASK0=1
  • P4WRMASK1=1
  • P4WRMASK2=1
  • P4WRMASK3=1
  • P5ARBEN=1
  • P5CLK=1
  • P5CMDBA0=1
  • P5CMDBA1=1
  • P5CMDBA2=1
  • P5CMDBL0=1
  • P5CMDBL1=1
  • P5CMDBL2=1
  • P5CMDBL3=1
  • P5CMDBL4=1
  • P5CMDBL5=1
  • P5CMDCA0=1
  • P5CMDCA1=1
  • P5CMDCA10=1
  • P5CMDCA11=1
  • P5CMDCA2=1
  • P5CMDCA3=1
  • P5CMDCA4=1
  • P5CMDCA5=1
  • P5CMDCA6=1
  • P5CMDCA7=1
  • P5CMDCA8=1
  • P5CMDCA9=1
  • P5CMDCLK=1
  • P5CMDEN=1
  • P5CMDINSTR0=1
  • P5CMDINSTR1=1
  • P5CMDINSTR2=1
  • P5CMDRA0=1
  • P5CMDRA1=1
  • P5CMDRA10=1
  • P5CMDRA11=1
  • P5CMDRA12=1
  • P5CMDRA13=1
  • P5CMDRA14=1
  • P5CMDRA2=1
  • P5CMDRA3=1
  • P5CMDRA4=1
  • P5CMDRA5=1
  • P5CMDRA6=1
  • P5CMDRA7=1
  • P5CMDRA8=1
  • P5CMDRA9=1
  • P5EN=1
  • P5FULL=1
  • P5WRDATA0=1
  • P5WRDATA1=1
  • P5WRDATA10=1
  • P5WRDATA11=1
  • P5WRDATA12=1
  • P5WRDATA13=1
  • P5WRDATA14=1
  • P5WRDATA15=1
  • P5WRDATA16=1
  • P5WRDATA17=1
  • P5WRDATA18=1
  • P5WRDATA19=1
  • P5WRDATA2=1
  • P5WRDATA20=1
  • P5WRDATA21=1
  • P5WRDATA22=1
  • P5WRDATA23=1
  • P5WRDATA24=1
  • P5WRDATA25=1
  • P5WRDATA26=1
  • P5WRDATA27=1
  • P5WRDATA28=1
  • P5WRDATA29=1
  • P5WRDATA3=1
  • P5WRDATA30=1
  • P5WRDATA31=1
  • P5WRDATA4=1
  • P5WRDATA5=1
  • P5WRDATA6=1
  • P5WRDATA7=1
  • P5WRDATA8=1
  • P5WRDATA9=1
  • P5WRMASK0=1
  • P5WRMASK1=1
  • P5WRMASK2=1
  • P5WRMASK3=1
  • PLLCE0=1
  • PLLCE1=1
  • PLLCLK0=1
  • PLLCLK1=1
  • PLLLOCK=1
  • RAS=1
  • RECAL=1
  • RST=1
  • SELFREFRESHENTER=1
  • SELFREFRESHMODE=1
  • SYSRST=1
  • UDMN=1
  • UDMP=1
  • UDQSIOIN=1
  • UDQSIOIP=1
  • UIADD=1
  • UIADDR0=1
  • UIADDR1=1
  • UIADDR2=1
  • UIADDR3=1
  • UIADDR4=1
  • UIBROADCAST=1
  • UICLK=1
  • UICMD=1
  • UICMDEN=1
  • UICMDIN=1
  • UICS=1
  • UIDONECAL=1
  • UIDQCOUNT0=1
  • UIDQCOUNT1=1
  • UIDQCOUNT2=1
  • UIDQCOUNT3=1
  • UIDQLOWERDEC=1
  • UIDQLOWERINC=1
  • UIDQUPPERDEC=1
  • UIDQUPPERINC=1
  • UIDRPUPDATE=1
  • UILDQSDEC=1
  • UILDQSINC=1
  • UIREAD=1
  • UISDI=1
  • UIUDQSDEC=1
  • UIUDQSINC=1
  • UODONECAL=1
  • UOREFRSHFLAG=1
  • UOSDO=1
  • WE=1
 MCB_MCB
  • ADDR0=1
  • ADDR1=1
  • ADDR10=1
  • ADDR11=1
  • ADDR12=1
  • ADDR13=1
  • ADDR14=1
  • ADDR2=1
  • ADDR3=1
  • ADDR4=1
  • ADDR5=1
  • ADDR6=1
  • ADDR7=1
  • ADDR8=1
  • ADDR9=1
  • BA0=1
  • BA1=1
  • BA2=1
  • CAS=1
  • CKE=1
  • DQI0=1
  • DQI1=1
  • DQI10=1
  • DQI11=1
  • DQI12=1
  • DQI13=1
  • DQI14=1
  • DQI15=1
  • DQI2=1
  • DQI3=1
  • DQI4=1
  • DQI5=1
  • DQI6=1
  • DQI7=1
  • DQI8=1
  • DQI9=1
  • DQIOWEN0=1
  • DQON0=1
  • DQON1=1
  • DQON10=1
  • DQON11=1
  • DQON12=1
  • DQON13=1
  • DQON14=1
  • DQON15=1
  • DQON2=1
  • DQON3=1
  • DQON4=1
  • DQON5=1
  • DQON6=1
  • DQON7=1
  • DQON8=1
  • DQON9=1
  • DQOP0=1
  • DQOP1=1
  • DQOP10=1
  • DQOP11=1
  • DQOP12=1
  • DQOP13=1
  • DQOP14=1
  • DQOP15=1
  • DQOP2=1
  • DQOP3=1
  • DQOP4=1
  • DQOP5=1
  • DQOP6=1
  • DQOP7=1
  • DQOP8=1
  • DQOP9=1
  • DQSIOIN=1
  • DQSIOIP=1
  • DQSIOWEN90N=1
  • DQSIOWEN90P=1
  • IOIDRPADD=1
  • IOIDRPADDR0=1
  • IOIDRPADDR1=1
  • IOIDRPADDR2=1
  • IOIDRPADDR3=1
  • IOIDRPADDR4=1
  • IOIDRPBROADCAST=1
  • IOIDRPCLK=1
  • IOIDRPCS=1
  • IOIDRPSDI=1
  • IOIDRPSDO=1
  • IOIDRPTRAIN=1
  • IOIDRPUPDATE=1
  • LDMN=1
  • LDMP=1
  • ODT=1
  • P0ARBEN=1
  • P0CMDBA0=1
  • P0CMDBA1=1
  • P0CMDBA2=1
  • P0CMDBL0=1
  • P0CMDBL1=1
  • P0CMDBL2=1
  • P0CMDBL3=1
  • P0CMDBL4=1
  • P0CMDBL5=1
  • P0CMDCA0=1
  • P0CMDCA1=1
  • P0CMDCA10=1
  • P0CMDCA11=1
  • P0CMDCA2=1
  • P0CMDCA3=1
  • P0CMDCA4=1
  • P0CMDCA5=1
  • P0CMDCA6=1
  • P0CMDCA7=1
  • P0CMDCA8=1
  • P0CMDCA9=1
  • P0CMDCLK=1
  • P0CMDEN=1
  • P0CMDINSTR0=1
  • P0CMDINSTR1=1
  • P0CMDINSTR2=1
  • P0CMDRA0=1
  • P0CMDRA1=1
  • P0CMDRA10=1
  • P0CMDRA11=1
  • P0CMDRA12=1
  • P0CMDRA13=1
  • P0CMDRA14=1
  • P0CMDRA2=1
  • P0CMDRA3=1
  • P0CMDRA4=1
  • P0CMDRA5=1
  • P0CMDRA6=1
  • P0CMDRA7=1
  • P0CMDRA8=1
  • P0CMDRA9=1
  • P0RDCLK=1
  • P0RDDATA0=1
  • P0RDDATA1=1
  • P0RDDATA10=1
  • P0RDDATA11=1
  • P0RDDATA12=1
  • P0RDDATA13=1
  • P0RDDATA14=1
  • P0RDDATA15=1
  • P0RDDATA16=1
  • P0RDDATA17=1
  • P0RDDATA18=1
  • P0RDDATA19=1
  • P0RDDATA2=1
  • P0RDDATA20=1
  • P0RDDATA21=1
  • P0RDDATA22=1
  • P0RDDATA23=1
  • P0RDDATA24=1
  • P0RDDATA25=1
  • P0RDDATA26=1
  • P0RDDATA27=1
  • P0RDDATA28=1
  • P0RDDATA29=1
  • P0RDDATA3=1
  • P0RDDATA30=1
  • P0RDDATA31=1
  • P0RDDATA4=1
  • P0RDDATA5=1
  • P0RDDATA6=1
  • P0RDDATA7=1
  • P0RDDATA8=1
  • P0RDDATA9=1
  • P0RDEN=1
  • P0RWRMASK0=1
  • P0RWRMASK1=1
  • P0RWRMASK2=1
  • P0RWRMASK3=1
  • P0WRCLK=1
  • P0WRDATA0=1
  • P0WRDATA1=1
  • P0WRDATA10=1
  • P0WRDATA11=1
  • P0WRDATA12=1
  • P0WRDATA13=1
  • P0WRDATA14=1
  • P0WRDATA15=1
  • P0WRDATA16=1
  • P0WRDATA17=1
  • P0WRDATA18=1
  • P0WRDATA19=1
  • P0WRDATA2=1
  • P0WRDATA20=1
  • P0WRDATA21=1
  • P0WRDATA22=1
  • P0WRDATA23=1
  • P0WRDATA24=1
  • P0WRDATA25=1
  • P0WRDATA26=1
  • P0WRDATA27=1
  • P0WRDATA28=1
  • P0WRDATA29=1
  • P0WRDATA3=1
  • P0WRDATA30=1
  • P0WRDATA31=1
  • P0WRDATA4=1
  • P0WRDATA5=1
  • P0WRDATA6=1
  • P0WRDATA7=1
  • P0WRDATA8=1
  • P0WRDATA9=1
  • P0WREN=1
  • P1ARBEN=1
  • P1CMDBA0=1
  • P1CMDBA1=1
  • P1CMDBA2=1
  • P1CMDBL0=1
  • P1CMDBL1=1
  • P1CMDBL2=1
  • P1CMDBL3=1
  • P1CMDBL4=1
  • P1CMDBL5=1
  • P1CMDCA0=1
  • P1CMDCA1=1
  • P1CMDCA10=1
  • P1CMDCA11=1
  • P1CMDCA2=1
  • P1CMDCA3=1
  • P1CMDCA4=1
  • P1CMDCA5=1
  • P1CMDCA6=1
  • P1CMDCA7=1
  • P1CMDCA8=1
  • P1CMDCA9=1
  • P1CMDCLK=1
  • P1CMDEN=1
  • P1CMDINSTR0=1
  • P1CMDINSTR1=1
  • P1CMDINSTR2=1
  • P1CMDRA0=1
  • P1CMDRA1=1
  • P1CMDRA10=1
  • P1CMDRA11=1
  • P1CMDRA12=1
  • P1CMDRA13=1
  • P1CMDRA14=1
  • P1CMDRA2=1
  • P1CMDRA3=1
  • P1CMDRA4=1
  • P1CMDRA5=1
  • P1CMDRA6=1
  • P1CMDRA7=1
  • P1CMDRA8=1
  • P1CMDRA9=1
  • P1RDCLK=1
  • P1RDDATA0=1
  • P1RDDATA1=1
  • P1RDDATA10=1
  • P1RDDATA11=1
  • P1RDDATA12=1
  • P1RDDATA13=1
  • P1RDDATA14=1
  • P1RDDATA15=1
  • P1RDDATA16=1
  • P1RDDATA17=1
  • P1RDDATA18=1
  • P1RDDATA19=1
  • P1RDDATA2=1
  • P1RDDATA20=1
  • P1RDDATA21=1
  • P1RDDATA22=1
  • P1RDDATA23=1
  • P1RDDATA24=1
  • P1RDDATA25=1
  • P1RDDATA26=1
  • P1RDDATA27=1
  • P1RDDATA28=1
  • P1RDDATA29=1
  • P1RDDATA3=1
  • P1RDDATA30=1
  • P1RDDATA31=1
  • P1RDDATA4=1
  • P1RDDATA5=1
  • P1RDDATA6=1
  • P1RDDATA7=1
  • P1RDDATA8=1
  • P1RDDATA9=1
  • P1RDEN=1
  • P1RWRMASK0=1
  • P1RWRMASK1=1
  • P1RWRMASK2=1
  • P1RWRMASK3=1
  • P1WRCLK=1
  • P1WRDATA0=1
  • P1WRDATA1=1
  • P1WRDATA10=1
  • P1WRDATA11=1
  • P1WRDATA12=1
  • P1WRDATA13=1
  • P1WRDATA14=1
  • P1WRDATA15=1
  • P1WRDATA16=1
  • P1WRDATA17=1
  • P1WRDATA18=1
  • P1WRDATA19=1
  • P1WRDATA2=1
  • P1WRDATA20=1
  • P1WRDATA21=1
  • P1WRDATA22=1
  • P1WRDATA23=1
  • P1WRDATA24=1
  • P1WRDATA25=1
  • P1WRDATA26=1
  • P1WRDATA27=1
  • P1WRDATA28=1
  • P1WRDATA29=1
  • P1WRDATA3=1
  • P1WRDATA30=1
  • P1WRDATA31=1
  • P1WRDATA4=1
  • P1WRDATA5=1
  • P1WRDATA6=1
  • P1WRDATA7=1
  • P1WRDATA8=1
  • P1WRDATA9=1
  • P1WREN=1
  • P2ARBEN=1
  • P2CLK=1
  • P2CMDBA0=1
  • P2CMDBA1=1
  • P2CMDBA2=1
  • P2CMDBL0=1
  • P2CMDBL1=1
  • P2CMDBL2=1
  • P2CMDBL3=1
  • P2CMDBL4=1
  • P2CMDBL5=1
  • P2CMDCA0=1
  • P2CMDCA1=1
  • P2CMDCA10=1
  • P2CMDCA11=1
  • P2CMDCA2=1
  • P2CMDCA3=1
  • P2CMDCA4=1
  • P2CMDCA5=1
  • P2CMDCA6=1
  • P2CMDCA7=1
  • P2CMDCA8=1
  • P2CMDCA9=1
  • P2CMDCLK=1
  • P2CMDEN=1
  • P2CMDINSTR0=1
  • P2CMDINSTR1=1
  • P2CMDINSTR2=1
  • P2CMDRA0=1
  • P2CMDRA1=1
  • P2CMDRA10=1
  • P2CMDRA11=1
  • P2CMDRA12=1
  • P2CMDRA13=1
  • P2CMDRA14=1
  • P2CMDRA2=1
  • P2CMDRA3=1
  • P2CMDRA4=1
  • P2CMDRA5=1
  • P2CMDRA6=1
  • P2CMDRA7=1
  • P2CMDRA8=1
  • P2CMDRA9=1
  • P2EN=1
  • P2RDDATA0=1
  • P2RDDATA1=1
  • P2RDDATA10=1
  • P2RDDATA11=1
  • P2RDDATA12=1
  • P2RDDATA13=1
  • P2RDDATA14=1
  • P2RDDATA15=1
  • P2RDDATA16=1
  • P2RDDATA17=1
  • P2RDDATA18=1
  • P2RDDATA19=1
  • P2RDDATA2=1
  • P2RDDATA20=1
  • P2RDDATA21=1
  • P2RDDATA22=1
  • P2RDDATA23=1
  • P2RDDATA24=1
  • P2RDDATA25=1
  • P2RDDATA26=1
  • P2RDDATA27=1
  • P2RDDATA28=1
  • P2RDDATA29=1
  • P2RDDATA3=1
  • P2RDDATA30=1
  • P2RDDATA31=1
  • P2RDDATA4=1
  • P2RDDATA5=1
  • P2RDDATA6=1
  • P2RDDATA7=1
  • P2RDDATA8=1
  • P2RDDATA9=1
  • P2WRDATA0=1
  • P2WRDATA1=1
  • P2WRDATA10=1
  • P2WRDATA11=1
  • P2WRDATA12=1
  • P2WRDATA13=1
  • P2WRDATA14=1
  • P2WRDATA15=1
  • P2WRDATA16=1
  • P2WRDATA17=1
  • P2WRDATA18=1
  • P2WRDATA19=1
  • P2WRDATA2=1
  • P2WRDATA20=1
  • P2WRDATA21=1
  • P2WRDATA22=1
  • P2WRDATA23=1
  • P2WRDATA24=1
  • P2WRDATA25=1
  • P2WRDATA26=1
  • P2WRDATA27=1
  • P2WRDATA28=1
  • P2WRDATA29=1
  • P2WRDATA3=1
  • P2WRDATA30=1
  • P2WRDATA31=1
  • P2WRDATA4=1
  • P2WRDATA5=1
  • P2WRDATA6=1
  • P2WRDATA7=1
  • P2WRDATA8=1
  • P2WRDATA9=1
  • P2WRMASK0=1
  • P2WRMASK1=1
  • P2WRMASK2=1
  • P2WRMASK3=1
  • P3ARBEN=1
  • P3CLK=1
  • P3CMDBA0=1
  • P3CMDBA1=1
  • P3CMDBA2=1
  • P3CMDBL0=1
  • P3CMDBL1=1
  • P3CMDBL2=1
  • P3CMDBL3=1
  • P3CMDBL4=1
  • P3CMDBL5=1
  • P3CMDCA0=1
  • P3CMDCA1=1
  • P3CMDCA10=1
  • P3CMDCA11=1
  • P3CMDCA2=1
  • P3CMDCA3=1
  • P3CMDCA4=1
  • P3CMDCA5=1
  • P3CMDCA6=1
  • P3CMDCA7=1
  • P3CMDCA8=1
  • P3CMDCA9=1
  • P3CMDCLK=1
  • P3CMDEN=1
  • P3CMDINSTR0=1
  • P3CMDINSTR1=1
  • P3CMDINSTR2=1
  • P3CMDRA0=1
  • P3CMDRA1=1
  • P3CMDRA10=1
  • P3CMDRA11=1
  • P3CMDRA12=1
  • P3CMDRA13=1
  • P3CMDRA14=1
  • P3CMDRA2=1
  • P3CMDRA3=1
  • P3CMDRA4=1
  • P3CMDRA5=1
  • P3CMDRA6=1
  • P3CMDRA7=1
  • P3CMDRA8=1
  • P3CMDRA9=1
  • P3EN=1
  • P3WRDATA0=1
  • P3WRDATA1=1
  • P3WRDATA10=1
  • P3WRDATA11=1
  • P3WRDATA12=1
  • P3WRDATA13=1
  • P3WRDATA14=1
  • P3WRDATA15=1
  • P3WRDATA16=1
  • P3WRDATA17=1
  • P3WRDATA18=1
  • P3WRDATA19=1
  • P3WRDATA2=1
  • P3WRDATA20=1
  • P3WRDATA21=1
  • P3WRDATA22=1
  • P3WRDATA23=1
  • P3WRDATA24=1
  • P3WRDATA25=1
  • P3WRDATA26=1
  • P3WRDATA27=1
  • P3WRDATA28=1
  • P3WRDATA29=1
  • P3WRDATA3=1
  • P3WRDATA30=1
  • P3WRDATA31=1
  • P3WRDATA4=1
  • P3WRDATA5=1
  • P3WRDATA6=1
  • P3WRDATA7=1
  • P3WRDATA8=1
  • P3WRDATA9=1
  • P3WRMASK0=1
  • P3WRMASK1=1
  • P3WRMASK2=1
  • P3WRMASK3=1
  • P4ARBEN=1
  • P4CLK=1
  • P4CMDBA0=1
  • P4CMDBA1=1
  • P4CMDBA2=1
  • P4CMDBL0=1
  • P4CMDBL1=1
  • P4CMDBL2=1
  • P4CMDBL3=1
  • P4CMDBL4=1
  • P4CMDBL5=1
  • P4CMDCA0=1
  • P4CMDCA1=1
  • P4CMDCA10=1
  • P4CMDCA11=1
  • P4CMDCA2=1
  • P4CMDCA3=1
  • P4CMDCA4=1
  • P4CMDCA5=1
  • P4CMDCA6=1
  • P4CMDCA7=1
  • P4CMDCA8=1
  • P4CMDCA9=1
  • P4CMDCLK=1
  • P4CMDEN=1
  • P4CMDINSTR0=1
  • P4CMDINSTR1=1
  • P4CMDINSTR2=1
  • P4CMDRA0=1
  • P4CMDRA1=1
  • P4CMDRA10=1
  • P4CMDRA11=1
  • P4CMDRA12=1
  • P4CMDRA13=1
  • P4CMDRA14=1
  • P4CMDRA2=1
  • P4CMDRA3=1
  • P4CMDRA4=1
  • P4CMDRA5=1
  • P4CMDRA6=1
  • P4CMDRA7=1
  • P4CMDRA8=1
  • P4CMDRA9=1
  • P4EMPTY=1
  • P4EN=1
  • P4RDDATA0=1
  • P4RDDATA1=1
  • P4RDDATA10=1
  • P4RDDATA11=1
  • P4RDDATA12=1
  • P4RDDATA13=1
  • P4RDDATA14=1
  • P4RDDATA15=1
  • P4RDDATA16=1
  • P4RDDATA17=1
  • P4RDDATA18=1
  • P4RDDATA19=1
  • P4RDDATA2=1
  • P4RDDATA20=1
  • P4RDDATA21=1
  • P4RDDATA22=1
  • P4RDDATA23=1
  • P4RDDATA24=1
  • P4RDDATA25=1
  • P4RDDATA26=1
  • P4RDDATA27=1
  • P4RDDATA28=1
  • P4RDDATA29=1
  • P4RDDATA3=1
  • P4RDDATA30=1
  • P4RDDATA31=1
  • P4RDDATA4=1
  • P4RDDATA5=1
  • P4RDDATA6=1
  • P4RDDATA7=1
  • P4RDDATA8=1
  • P4RDDATA9=1
  • P4WRDATA0=1
  • P4WRDATA1=1
  • P4WRDATA10=1
  • P4WRDATA11=1
  • P4WRDATA12=1
  • P4WRDATA13=1
  • P4WRDATA14=1
  • P4WRDATA15=1
  • P4WRDATA16=1
  • P4WRDATA17=1
  • P4WRDATA18=1
  • P4WRDATA19=1
  • P4WRDATA2=1
  • P4WRDATA20=1
  • P4WRDATA21=1
  • P4WRDATA22=1
  • P4WRDATA23=1
  • P4WRDATA24=1
  • P4WRDATA25=1
  • P4WRDATA26=1
  • P4WRDATA27=1
  • P4WRDATA28=1
  • P4WRDATA29=1
  • P4WRDATA3=1
  • P4WRDATA30=1
  • P4WRDATA31=1
  • P4WRDATA4=1
  • P4WRDATA5=1
  • P4WRDATA6=1
  • P4WRDATA7=1
  • P4WRDATA8=1
  • P4WRDATA9=1
  • P4WRMASK0=1
  • P4WRMASK1=1
  • P4WRMASK2=1
  • P4WRMASK3=1
  • P5ARBEN=1
  • P5CLK=1
  • P5CMDBA0=1
  • P5CMDBA1=1
  • P5CMDBA2=1
  • P5CMDBL0=1
  • P5CMDBL1=1
  • P5CMDBL2=1
  • P5CMDBL3=1
  • P5CMDBL4=1
  • P5CMDBL5=1
  • P5CMDCA0=1
  • P5CMDCA1=1
  • P5CMDCA10=1
  • P5CMDCA11=1
  • P5CMDCA2=1
  • P5CMDCA3=1
  • P5CMDCA4=1
  • P5CMDCA5=1
  • P5CMDCA6=1
  • P5CMDCA7=1
  • P5CMDCA8=1
  • P5CMDCA9=1
  • P5CMDCLK=1
  • P5CMDEN=1
  • P5CMDINSTR0=1
  • P5CMDINSTR1=1
  • P5CMDINSTR2=1
  • P5CMDRA0=1
  • P5CMDRA1=1
  • P5CMDRA10=1
  • P5CMDRA11=1
  • P5CMDRA12=1
  • P5CMDRA13=1
  • P5CMDRA14=1
  • P5CMDRA2=1
  • P5CMDRA3=1
  • P5CMDRA4=1
  • P5CMDRA5=1
  • P5CMDRA6=1
  • P5CMDRA7=1
  • P5CMDRA8=1
  • P5CMDRA9=1
  • P5EN=1
  • P5FULL=1
  • P5WRDATA0=1
  • P5WRDATA1=1
  • P5WRDATA10=1
  • P5WRDATA11=1
  • P5WRDATA12=1
  • P5WRDATA13=1
  • P5WRDATA14=1
  • P5WRDATA15=1
  • P5WRDATA16=1
  • P5WRDATA17=1
  • P5WRDATA18=1
  • P5WRDATA19=1
  • P5WRDATA2=1
  • P5WRDATA20=1
  • P5WRDATA21=1
  • P5WRDATA22=1
  • P5WRDATA23=1
  • P5WRDATA24=1
  • P5WRDATA25=1
  • P5WRDATA26=1
  • P5WRDATA27=1
  • P5WRDATA28=1
  • P5WRDATA29=1
  • P5WRDATA3=1
  • P5WRDATA30=1
  • P5WRDATA31=1
  • P5WRDATA4=1
  • P5WRDATA5=1
  • P5WRDATA6=1
  • P5WRDATA7=1
  • P5WRDATA8=1
  • P5WRDATA9=1
  • P5WRMASK0=1
  • P5WRMASK1=1
  • P5WRMASK2=1
  • P5WRMASK3=1
  • PLLCE0=1
  • PLLCE1=1
  • PLLCLK0=1
  • PLLCLK1=1
  • PLLLOCK=1
  • RAS=1
  • RECAL=1
  • RST=1
  • SELFREFRESHENTER=1
  • SELFREFRESHMODE=1
  • SYSRST=1
  • UDMN=1
  • UDMP=1
  • UDQSIOIN=1
  • UDQSIOIP=1
  • UIADD=1
  • UIADDR0=1
  • UIADDR1=1
  • UIADDR2=1
  • UIADDR3=1
  • UIADDR4=1
  • UIBROADCAST=1
  • UICLK=1
  • UICMD=1
  • UICMDEN=1
  • UICMDIN=1
  • UICS=1
  • UIDONECAL=1
  • UIDQCOUNT0=1
  • UIDQCOUNT1=1
  • UIDQCOUNT2=1
  • UIDQCOUNT3=1
  • UIDQLOWERDEC=1
  • UIDQLOWERINC=1
  • UIDQUPPERDEC=1
  • UIDQUPPERINC=1
  • UIDRPUPDATE=1
  • UILDQSDEC=1
  • UILDQSINC=1
  • UIREAD=1
  • UISDI=1
  • UIUDQSDEC=1
  • UIUDQSINC=1
  • UODONECAL=1
  • UOREFRSHFLAG=1
  • UOSDO=1
  • WE=1
 NULLMUX
  • 0=2
  • OUT=2
 OSERDES2
  • CLK0=48
  • D1=48
  • D2=48
  • D3=48
  • D4=48
  • IOCE=48
  • OCE=48
  • OQ=48
  • RST=48
  • T1=48
  • T2=48
  • T3=48
  • T4=48
  • TCE=48
  • TQ=48
  • TRAIN=48
 OSERDES2_OSERDES2
  • CLK0=48
  • D1=48
  • D2=48
  • D3=48
  • D4=48
  • IOCE=48
  • OCE=48
  • OQ=48
  • RST=48
  • T1=48
  • T2=48
  • T3=48
  • T4=48
  • TCE=48
  • TQ=48
  • TRAIN=48
 PAD
  • PAD=54
 PLL_ADV
  • CLKFBIN=2
  • CLKFBOUT=2
  • CLKIN1=2
  • CLKOUT0=2
  • CLKOUT1=2
  • CLKOUT2=1
  • CLKOUT3=1
  • DADDR0=1
  • DADDR1=1
  • DADDR2=1
  • DADDR3=1
  • DADDR4=1
  • DCLK=1
  • DEN=1
  • DI0=1
  • DI1=1
  • DI10=1
  • DI11=1
  • DI12=1
  • DI13=1
  • DI14=1
  • DI15=1
  • DI2=1
  • DI3=1
  • DI4=1
  • DI5=1
  • DI6=1
  • DI7=1
  • DI8=1
  • DI9=1
  • DWE=1
  • LOCKED=2
  • RST=2
 PLL_ADV_PLL_ADV
  • CLKFBIN=2
  • CLKFBOUT=2
  • CLKIN1=2
  • CLKOUT0=2
  • CLKOUT1=2
  • CLKOUT2=1
  • CLKOUT3=1
  • DADDR0=1
  • DADDR1=1
  • DADDR2=1
  • DADDR3=1
  • DADDR4=1
  • DCLK=1
  • DEN=1
  • DI0=1
  • DI1=1
  • DI10=1
  • DI11=1
  • DI12=1
  • DI13=1
  • DI14=1
  • DI15=1
  • DI2=1
  • DI3=1
  • DI4=1
  • DI5=1
  • DI6=1
  • DI7=1
  • DI8=1
  • DI9=1
  • DWE=1
  • LOCKED=2
  • RST=2
 PULL_OR_KEEP1
  • PAD=5
 RAMB16BWER
  • ADDRA0=2
  • ADDRA1=2
  • ADDRA10=2
  • ADDRA11=2
  • ADDRA12=2
  • ADDRA13=2
  • ADDRA2=2
  • ADDRA3=2
  • ADDRA4=2
  • ADDRA5=2
  • ADDRA6=2
  • ADDRA7=2
  • ADDRA8=2
  • ADDRA9=2
  • ADDRB0=2
  • ADDRB1=2
  • ADDRB10=2
  • ADDRB11=2
  • ADDRB12=2
  • ADDRB13=2
  • ADDRB2=2
  • ADDRB3=2
  • ADDRB4=2
  • ADDRB5=2
  • ADDRB6=2
  • ADDRB7=2
  • ADDRB8=2
  • ADDRB9=2
  • CLKA=2
  • CLKB=2
  • DIA0=2
  • DIA1=2
  • DIA10=2
  • DIA11=2
  • DIA12=2
  • DIA13=2
  • DIA14=2
  • DIA15=2
  • DIA16=2
  • DIA17=2
  • DIA18=2
  • DIA19=2
  • DIA2=2
  • DIA20=2
  • DIA21=2
  • DIA22=2
  • DIA23=2
  • DIA24=2
  • DIA25=2
  • DIA26=2
  • DIA27=2
  • DIA28=2
  • DIA29=2
  • DIA3=2
  • DIA30=2
  • DIA31=2
  • DIA4=2
  • DIA5=2
  • DIA6=2
  • DIA7=2
  • DIA8=2
  • DIA9=2
  • DIB0=2
  • DIB1=2
  • DIB10=2
  • DIB11=2
  • DIB12=2
  • DIB13=2
  • DIB14=2
  • DIB15=2
  • DIB16=2
  • DIB17=2
  • DIB18=2
  • DIB19=2
  • DIB2=2
  • DIB20=2
  • DIB21=2
  • DIB22=2
  • DIB23=2
  • DIB24=2
  • DIB25=2
  • DIB26=2
  • DIB27=2
  • DIB28=2
  • DIB29=2
  • DIB3=2
  • DIB30=2
  • DIB31=2
  • DIB4=2
  • DIB5=2
  • DIB6=2
  • DIB7=2
  • DIB8=2
  • DIB9=2
  • DIPA0=2
  • DIPA1=2
  • DIPA2=2
  • DIPA3=2
  • DIPB0=2
  • DIPB1=2
  • DIPB2=2
  • DIPB3=2
  • DOA0=2
  • DOA1=2
  • DOA10=2
  • DOA11=2
  • DOA12=2
  • DOA13=2
  • DOA14=2
  • DOA15=2
  • DOA2=2
  • DOA3=2
  • DOA4=2
  • DOA5=2
  • DOA6=2
  • DOA7=2
  • DOA8=2
  • DOA9=2
  • DOPA0=2
  • DOPA1=2
  • ENA=2
  • ENB=2
  • REGCEA=2
  • REGCEB=2
  • RSTA=2
  • RSTB=2
  • WEA0=2
  • WEA1=2
  • WEA2=2
  • WEA3=2
  • WEB0=2
  • WEB1=2
  • WEB2=2
  • WEB3=2
 RAMB16BWER_RAMB16BWER
  • ADDRA0=2
  • ADDRA1=2
  • ADDRA10=2
  • ADDRA11=2
  • ADDRA12=2
  • ADDRA13=2
  • ADDRA2=2
  • ADDRA3=2
  • ADDRA4=2
  • ADDRA5=2
  • ADDRA6=2
  • ADDRA7=2
  • ADDRA8=2
  • ADDRA9=2
  • ADDRB0=2
  • ADDRB1=2
  • ADDRB10=2
  • ADDRB11=2
  • ADDRB12=2
  • ADDRB13=2
  • ADDRB2=2
  • ADDRB3=2
  • ADDRB4=2
  • ADDRB5=2
  • ADDRB6=2
  • ADDRB7=2
  • ADDRB8=2
  • ADDRB9=2
  • CLKA=2
  • CLKB=2
  • DIA0=2
  • DIA1=2
  • DIA10=2
  • DIA11=2
  • DIA12=2
  • DIA13=2
  • DIA14=2
  • DIA15=2
  • DIA16=2
  • DIA17=2
  • DIA18=2
  • DIA19=2
  • DIA2=2
  • DIA20=2
  • DIA21=2
  • DIA22=2
  • DIA23=2
  • DIA24=2
  • DIA25=2
  • DIA26=2
  • DIA27=2
  • DIA28=2
  • DIA29=2
  • DIA3=2
  • DIA30=2
  • DIA31=2
  • DIA4=2
  • DIA5=2
  • DIA6=2
  • DIA7=2
  • DIA8=2
  • DIA9=2
  • DIB0=2
  • DIB1=2
  • DIB10=2
  • DIB11=2
  • DIB12=2
  • DIB13=2
  • DIB14=2
  • DIB15=2
  • DIB16=2
  • DIB17=2
  • DIB18=2
  • DIB19=2
  • DIB2=2
  • DIB20=2
  • DIB21=2
  • DIB22=2
  • DIB23=2
  • DIB24=2
  • DIB25=2
  • DIB26=2
  • DIB27=2
  • DIB28=2
  • DIB29=2
  • DIB3=2
  • DIB30=2
  • DIB31=2
  • DIB4=2
  • DIB5=2
  • DIB6=2
  • DIB7=2
  • DIB8=2
  • DIB9=2
  • DIPA0=2
  • DIPA1=2
  • DIPA2=2
  • DIPA3=2
  • DIPB0=2
  • DIPB1=2
  • DIPB2=2
  • DIPB3=2
  • DOA0=2
  • DOA1=2
  • DOA10=2
  • DOA11=2
  • DOA12=2
  • DOA13=2
  • DOA14=2
  • DOA15=2
  • DOA2=2
  • DOA3=2
  • DOA4=2
  • DOA5=2
  • DOA6=2
  • DOA7=2
  • DOA8=2
  • DOA9=2
  • DOPA0=2
  • DOPA1=2
  • ENA=2
  • ENB=2
  • REGCEA=2
  • REGCEB=2
  • RSTA=2
  • RSTB=2
  • WEA0=2
  • WEA1=2
  • WEA2=2
  • WEA3=2
  • WEB0=2
  • WEB1=2
  • WEB2=2
  • WEB3=2
 RAMB8BWER
  • ADDRAWRADDR0=1
  • ADDRAWRADDR1=1
  • ADDRAWRADDR10=1
  • ADDRAWRADDR11=1
  • ADDRAWRADDR12=1
  • ADDRAWRADDR2=1
  • ADDRAWRADDR3=1
  • ADDRAWRADDR4=1
  • ADDRAWRADDR5=1
  • ADDRAWRADDR6=1
  • ADDRAWRADDR7=1
  • ADDRAWRADDR8=1
  • ADDRAWRADDR9=1
  • ADDRBRDADDR0=1
  • ADDRBRDADDR1=1
  • ADDRBRDADDR10=1
  • ADDRBRDADDR11=1
  • ADDRBRDADDR12=1
  • ADDRBRDADDR2=1
  • ADDRBRDADDR3=1
  • ADDRBRDADDR4=1
  • ADDRBRDADDR5=1
  • ADDRBRDADDR6=1
  • ADDRBRDADDR7=1
  • ADDRBRDADDR8=1
  • ADDRBRDADDR9=1
  • CLKAWRCLK=1
  • CLKBRDCLK=1
  • DIADI0=1
  • DIADI1=1
  • DIADI10=1
  • DIADI11=1
  • DIADI12=1
  • DIADI13=1
  • DIADI14=1
  • DIADI15=1
  • DIADI2=1
  • DIADI3=1
  • DIADI4=1
  • DIADI5=1
  • DIADI6=1
  • DIADI7=1
  • DIADI8=1
  • DIADI9=1
  • DIBDI0=1
  • DIBDI1=1
  • DIBDI10=1
  • DIBDI11=1
  • DIBDI12=1
  • DIBDI13=1
  • DIBDI14=1
  • DIBDI15=1
  • DIBDI2=1
  • DIBDI3=1
  • DIBDI4=1
  • DIBDI5=1
  • DIBDI6=1
  • DIBDI7=1
  • DIBDI8=1
  • DIBDI9=1
  • DIPADIP0=1
  • DIPADIP1=1
  • DIPBDIP0=1
  • DIPBDIP1=1
  • DOADO0=1
  • DOADO1=1
  • DOADO2=1
  • DOADO3=1
  • DOADO4=1
  • DOADO5=1
  • DOADO6=1
  • DOADO7=1
  • DOPADOP0=1
  • ENAWREN=1
  • ENBRDEN=1
  • REGCEA=1
  • REGCEBREGCE=1
  • RSTA=1
  • RSTBRST=1
  • WEAWEL0=1
  • WEAWEL1=1
  • WEBWEU0=1
  • WEBWEU1=1
 RAMB8BWER_RAMB8BWER
  • ADDRAWRADDR0=1
  • ADDRAWRADDR1=1
  • ADDRAWRADDR10=1
  • ADDRAWRADDR11=1
  • ADDRAWRADDR12=1
  • ADDRAWRADDR2=1
  • ADDRAWRADDR3=1
  • ADDRAWRADDR4=1
  • ADDRAWRADDR5=1
  • ADDRAWRADDR6=1
  • ADDRAWRADDR7=1
  • ADDRAWRADDR8=1
  • ADDRAWRADDR9=1
  • ADDRBRDADDR0=1
  • ADDRBRDADDR1=1
  • ADDRBRDADDR10=1
  • ADDRBRDADDR11=1
  • ADDRBRDADDR12=1
  • ADDRBRDADDR2=1
  • ADDRBRDADDR3=1
  • ADDRBRDADDR4=1
  • ADDRBRDADDR5=1
  • ADDRBRDADDR6=1
  • ADDRBRDADDR7=1
  • ADDRBRDADDR8=1
  • ADDRBRDADDR9=1
  • CLKAWRCLK=1
  • CLKBRDCLK=1
  • DIADI0=1
  • DIADI1=1
  • DIADI10=1
  • DIADI11=1
  • DIADI12=1
  • DIADI13=1
  • DIADI14=1
  • DIADI15=1
  • DIADI2=1
  • DIADI3=1
  • DIADI4=1
  • DIADI5=1
  • DIADI6=1
  • DIADI7=1
  • DIADI8=1
  • DIADI9=1
  • DIBDI0=1
  • DIBDI1=1
  • DIBDI10=1
  • DIBDI11=1
  • DIBDI12=1
  • DIBDI13=1
  • DIBDI14=1
  • DIBDI15=1
  • DIBDI2=1
  • DIBDI3=1
  • DIBDI4=1
  • DIBDI5=1
  • DIBDI6=1
  • DIBDI7=1
  • DIBDI8=1
  • DIBDI9=1
  • DIPADIP0=1
  • DIPADIP1=1
  • DIPBDIP0=1
  • DIPBDIP1=1
  • DOADO0=1
  • DOADO1=1
  • DOADO2=1
  • DOADO3=1
  • DOADO4=1
  • DOADO5=1
  • DOADO6=1
  • DOADO7=1
  • DOPADOP0=1
  • ENAWREN=1
  • ENBRDEN=1
  • REGCEA=1
  • REGCEBREGCE=1
  • RSTA=1
  • RSTBRST=1
  • WEAWEL0=1
  • WEAWEL1=1
  • WEBWEU0=1
  • WEBWEU1=1
 REG_SR
  • CE=395
  • CK=808
  • D=808
  • Q=808
  • SR=597
 SELMUX2_1
  • 0=17
  • 1=17
  • OUT=17
  • S0=17
 SLICEL
  • A=5
  • A1=15
  • A2=16
  • A3=21
  • A4=43
  • A5=54
  • A6=75
  • AMUX=36
  • AQ=36
  • AX=13
  • B=5
  • B1=9
  • B2=13
  • B3=18
  • B4=40
  • B5=49
  • B6=67
  • BMUX=38
  • BQ=29
  • BX=15
  • C=1
  • C1=16
  • C2=17
  • C3=20
  • C4=34
  • C5=49
  • C6=63
  • CE=27
  • CIN=56
  • CLK=41
  • CMUX=40
  • COUT=48
  • CQ=22
  • CX=19
  • D=2
  • D1=17
  • D2=19
  • D3=23
  • D4=37
  • D5=49
  • D6=65
  • DMUX=32
  • DQ=21
  • DX=10
  • SR=40
 SLICEM
  • A=19
  • A1=38
  • A2=38
  • A3=38
  • A4=38
  • A5=38
  • A6=37
  • AI=24
  • AMUX=8
  • AQ=9
  • AX=21
  • B=2
  • B1=21
  • B2=21
  • B3=21
  • B4=21
  • B5=21
  • B6=20
  • BI=6
  • BMUX=7
  • BQ=9
  • BX=20
  • C=6
  • C1=19
  • C2=21
  • C3=21
  • C4=21
  • C5=21
  • C6=21
  • CE=41
  • CI=8
  • CLK=41
  • CMUX=4
  • COUT=8
  • CQ=9
  • CX=18
  • D=3
  • D1=18
  • D2=18
  • D3=18
  • D4=18
  • D5=18
  • D6=18
  • DI=13
  • DMUX=31
  • DQ=9
  • DX=19
 SLICEX
  • A=134
  • A1=119
  • A2=170
  • A3=209
  • A4=233
  • A5=226
  • A6=229
  • AMUX=59
  • AQ=223
  • AX=118
  • B=102
  • B1=85
  • B2=124
  • B3=160
  • B4=174
  • B5=171
  • B6=171
  • BMUX=52
  • BQ=161
  • BX=87
  • C=95
  • C1=85
  • C2=129
  • C3=158
  • C4=173
  • C5=169
  • C6=170
  • CE=100
  • CLK=295
  • CMUX=39
  • CQ=148
  • CX=68
  • D=123
  • D1=96
  • D2=127
  • D3=164
  • D4=176
  • D5=174
  • D6=176
  • DMUX=46
  • DQ=132
  • DX=75
  • SR=226
 
Tool Usage
Command Line History
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx25-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx25-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx25-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx25-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx25-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx25-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx25-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx25-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx25-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx25-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx25-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx25-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx25-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx25-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx25-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx25-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -i -p xc6slx16-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • netgen -intstyle ise -insert_glbl true -w -dir netgen/translate -ofmt verilog -sim <fname>.ngd <fname>.v
  • netgen -intstyle ise -insert_glbl true -w -dir netgen/synthesis -ofmt verilog -sim <fname>.ngc <fname>.v
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
 
Software Quality
Run Statistics
Program NameRuns StartedRuns FinishedErrorsFatal ErrorsInternal ErrorsExceptionsCore Dumps
_impact 292 281 0 0 0 0 0
bitgen 178 178 0 0 0 0 0
bitinit 1 1 0 0 0 0 0
cse_server 135 130 0 0 0 0 0
edif2ngd 3 3 0 0 0 0 0
elfcheck 1 1 0 0 0 0 0
libgen 1 1 0 0 0 0 0
map 218 179 0 0 0 0 0
netgen 2 2 0 0 0 0 0
ngcbuild 237 237 0 0 0 0 0
ngdbuild 236 236 0 0 0 0 0
par 179 179 0 0 0 0 0
platgen 7 6 0 0 0 0 0
psf2Edward 1 1 0 0 0 0 0
trce 176 176 0 0 0 0 0
xdsgen 1 1 0 0 0 0 0
xps 17 9 0 0 0 0 0
xst 270 264 0 0 0 0 0
 
Project Statistics
PROP_Enable_Message_Filtering=false PROP_FitterReportFormat=HTML
PROP_LastAppliedGoal=Balanced PROP_LastAppliedStrategy=Xilinx Default (unlocked)
PROP_ManualCompileOrderImp=false PROP_PropSpecInProjFile=Store all values
PROP_Simulator=ISim (VHDL/Verilog) PROP_SynthTopFile=changed
PROP_Top_Level_Module_Type=HDL PROP_UseSmartGuide=false
PROP_UserConstraintEditorPreference=Text Editor PROP_intProjectCreationTimestamp=2015-08-29T23:20:46
PROP_intWbtProjectID=4E9456CA708748BEAEF63F093499BD17 PROP_intWbtProjectIteration=34
PROP_intWorkingDirLocWRTProjDir=Same PROP_intWorkingDirUsed=No
PROP_xilxBitgStart_IntDone=true PROP_AutoTop=true
PROP_DevFamily=Spartan6 PROP_DevDevice=xc6slx16
PROP_DevFamilyPMName=spartan6 PROP_DevPackage=ftg256
PROP_Synthesis_Tool=XST (VHDL/Verilog) PROP_DevSpeed=-2
PROP_PreferredLanguage=Verilog FILE_CDC=1
FILE_UCF=1 FILE_VERILOG=14
 
Core Statistics
Core Type=mig_v3_92
C3_AUTO_SR=ENABLED C3_CLKFBOUT_MULT_F=2 C3_CLKOUT_DIVIDE=1 C3_CLK_PERIOD=3000
C3_DATA_TERMINATION=25 Ohms C3_DEBUG_PORT=0 C3_HIGH_TEMP_SR=NORMAL C3_INPUT_PIN_TERMINATION=CALIB_TERM
C3_MEMORY_DEVICE_WIDTH=16 C3_MEMORY_PART=mt41j128m16xx-125 C3_MEM_ADDR_ORDER=ROW_BANK_COLUMN C3_MEM_INTERFACE_TYPE=DDR3_SDRAM
C3_OUTPUT_DRV=DIV6 C3_PORT_CONFIG=One 128-bit bi-directional port C3_PORT_ENABLE=Port0 C3_RTT_NOM=DIV4
INPUT_CLK_TYPE=Single-Ended LANGUAGE=Verilog NO_OF_CONTROLLERS=1 SYNTHESIS_TOOL=Foundation_ISE
Core Type=chipscope_icon_v1_06_a
c_build_revision=0 c_constraint_type=embedded c_core_major_ver=1 c_core_minor_alpha_ver=97
c_core_minor_ver=2 c_core_type=1 c_example_design=false c_major_version=14
c_mfg_id=1 c_minor_version=7 c_num_control_ports=1 c_part_idcode_register=0
c_use_bufr=0 c_use_control0=1 c_use_control1=0 c_use_control10=0
c_use_control11=0 c_use_control12=0 c_use_control13=0 c_use_control14=0
c_use_control2=0 c_use_control3=0 c_use_control4=0 c_use_control5=0
c_use_control6=0 c_use_control7=0 c_use_control8=0 c_use_control9=0
c_use_ext_bscan=0 c_use_jtag_bufg=1 c_use_new_parser=0 c_use_sim=0
c_use_softbscan=0 c_use_unused_bscan=0 c_use_xst_tck_workaround=1 c_user_scan_chain=1
c_xco_list=Number_Control_Ports=1;Use_Ext_Bscan=false;User_Scan_Chain=USER1;Enable_Jtag_Bufg=true;Use_Unused_Bscan=false;Use_Softbscan=false c_xdevicefamily=spartan6
Core Type=chipscope_ila_v1_05_a
c_build_revision=0 c_constraint_type=embedded c_core_major_ver=1 c_core_minor_alpha_ver=97
c_core_minor_ver=4 c_core_type=2 c_data_depth=1024 c_data_width=1
c_example_design=false c_ext_cap_pin_mode=0 c_ext_cap_rate_mode=0 c_ext_cap_use_reg=1
c_m0_tpid=0 c_m0_type=1 c_m10_tpid=10 c_m10_type=0
c_m11_tpid=11 c_m11_type=0 c_m12_tpid=12 c_m12_type=0
c_m13_tpid=13 c_m13_type=0 c_m14_tpid=14 c_m14_type=0
c_m15_tpid=15 c_m15_type=0 c_m1_tpid=1 c_m1_type=1
c_m2_tpid=2 c_m2_type=1 c_m3_tpid=3 c_m3_type=1
c_m4_tpid=4 c_m4_type=1 c_m5_tpid=5 c_m5_type=0
c_m6_tpid=6 c_m6_type=0 c_m7_tpid=7 c_m7_type=0
c_m8_tpid=8 c_m8_type=0 c_m9_tpid=9 c_m9_type=0
c_major_version=14 c_mcnt0_width=1 c_mcnt10_width=1 c_mcnt11_width=1
c_mcnt12_width=1 c_mcnt13_width=1 c_mcnt14_width=1 c_mcnt15_width=1
c_mcnt1_width=1 c_mcnt2_width=1 c_mcnt3_width=1 c_mcnt4_width=1
c_mcnt5_width=1 c_mcnt6_width=1 c_mcnt7_width=1 c_mcnt8_width=1
c_mcnt9_width=1 c_mfg_id=1 c_minor_version=7 c_num_ext_cap_pins=8
c_num_match_units=5 c_num_tseq_cnt=0 c_num_tseq_states=16 c_ram_type=1
c_srl16_type=2 c_tc_mcnt_width=1 c_timestamp_depth=512 c_timestamp_type=0
c_timestamp_width=32 c_trig0_width=6 c_trig10_width=1 c_trig11_width=1
c_trig12_width=1 c_trig13_width=1 c_trig14_width=1 c_trig15_width=1
c_trig1_width=8 c_trig2_width=7 c_trig3_width=8 c_trig4_width=7
c_trig5_width=1 c_trig6_width=1 c_trig7_width=1 c_trig8_width=1
c_trig9_width=1 c_tseq_cnt0_width=1 c_tseq_cnt1_width=1 c_tseq_type=1
c_use_atc_clkin=0 c_use_data=0 c_use_gap=0 c_use_inv_clk=0
c_use_mcnt0=0 c_use_mcnt1=0 c_use_mcnt10=0 c_use_mcnt11=0
c_use_mcnt12=0 c_use_mcnt13=0 c_use_mcnt14=0 c_use_mcnt15=0
c_use_mcnt2=0 c_use_mcnt3=0 c_use_mcnt4=0 c_use_mcnt5=0
c_use_mcnt6=0 c_use_mcnt7=0 c_use_mcnt8=0 c_use_mcnt9=0
c_use_rpm=1 c_use_storage_qual=1 c_use_tc_mcnt=0 c_use_trig0=1
c_use_trig1=1 c_use_trig10=0 c_use_trig11=0 c_use_trig12=0
c_use_trig13=0 c_use_trig14=0 c_use_trig15=0 c_use_trig2=1
c_use_trig3=1 c_use_trig4=1 c_use_trig5=0 c_use_trig6=0
c_use_trig7=0 c_use_trig8=0 c_use_trig9=0 c_use_trig_out=0
c_use_trigdata0=1 c_use_trigdata1=1 c_use_trigdata10=0 c_use_trigdata11=0
c_use_trigdata12=0 c_use_trigdata13=0 c_use_trigdata14=0 c_use_trigdata15=0
c_use_trigdata2=1 c_use_trigdata3=1 c_use_trigdata4=1 c_use_trigdata5=0
c_use_trigdata6=0 c_use_trigdata7=0 c_use_trigdata8=0 c_use_trigdata9=0
c_xco_list=Component_Name=ila_pro_0;Number_Of_Trigger_Ports=5;Max_Sequence_Levels=16;Use_RPMs=true;Enable_Trigger_Output_Port=false;Sample_On=Rising;Sample_Data_Depth=1024;Enable_Storage_Qualification=true;Data_Same_As_Trigger=true;Data_Port_Width=0;Trigger_Port_Width_1=6;Match_Units_1=1;Counter_Width_1=Disabled;Match_Type_1=basic_with_edges;Exclude_From_Data_Storage_1=false;Trigger_Port_Width_2=8;Match_Units_2=1;Counter_Width_2=Disabled;Match_Type_2=basic_with_edges;Exclude_From_Data_Storage_2=false;Trigger_Port_Width_3=7;Match_Units_3=1;Counter_Width_3=Disabled;Match_Type_3=basic_with_edges;Exclude_From_Data_Storage_3=false;Trigger_Port_Width_4=8;Match_Units_4=1;Counter_Width_4=Disabled;Match_Type_4=basic_with_edges;Exclude_From_Data_Storage_4=false;Trigger_Port_Width_5=7;Match_Units_5=1;Counter_Width_5=Disabled;Match_Type_5=basic_with_edges;Exclude_From_Data_Storage_5=false;Trigger_Port_Width_6=1;Match_Units_6=1;Counter_Width_6=Disabled;Match_Type_6=basic;Exclude_From_Data_Storage_6=false;Trigger_Port_Width_7=1;Match_Units_7=1;Counter_Width_7=Disabled;Match_Type_7=basic;Exclude_From_Data_Storage_7=false;Trigger_Port_Width_8=1;Match_Units_8=1;Counter_Width_8=Disabled;Match_Type_8=basic;Exclude_From_Data_Storage_8=false;Trigger_Port_Width_9=1;Match_Units_9=1;Counter_Width_9=Disabled;Match_Type_9=basic;Exclude_From_Data_Storage_9=false;Trigger_Port_Width_10=1;Match_Units_10=1;Counter_Width_10=Disabled;Match_Type_10=basic;Exclude_From_Data_Storage_10=false;Trigger_Port_Width_11=1;Match_Units_11=1;Counter_Width_11=Disabled;Match_Type_11=basic;Exclude_From_Data_Storage_11=false;Trigger_Port_Width_12=1;Match_Units_12=1;Counter_Width_12=Disabled;Match_Type_12=basic;Exclude_From_Data_Storage_12=false;Trigger_Port_Width_13=1;Match_Units_13=1;Counter_Width_13=Disabled;Match_Type_13=basic;Exclude_From_Data_Storage_13=false;Trigger_Port_Width_14=1;Match_Units_14=1;Counter_Width_14=Disabled;Match_Type_14=basic;Exclude_From_Data_Storage_14=false;Trigger_Port_Width_15=1;Match_Units_15=1;Counter_Width_15=Disabled;Match_Type_15=basic;Exclude_From_Data_Storage_15=false;Trigger_Port_Width_16=1;Match_Units_16=1;Counter_Width_16=Disabled;Match_Type_16=basic;Exclude_From_Data_Storage_16=false c_xdevicefamily=spartan6
 
Unisim Statistics
XST_UNISIM_SUMMARY
XST_NUM_BUFG=1 XST_NUM_BUFGCE=1 XST_NUM_IBUFG=1 XST_NUM_IOBUF=1
XST_NUM_IOBUFDS=1 XST_NUM_IODRP2=1 XST_NUM_MCB=1 XST_NUM_OBUFT=1
XST_NUM_OBUFTDS=1 XST_NUM_OSERDES2=47 XST_NUM_PULLDOWN=1 XST_NUM_PULLUP=1
NGDBUILD_PRE_UNISIM_SUMMARY
NGDBUILD_NUM_BSCAN_SPARTAN6=1 NGDBUILD_NUM_BUFG=2 NGDBUILD_NUM_BUFGMUX=4 NGDBUILD_NUM_BUFPLL_MCB=1
NGDBUILD_NUM_FD=106 NGDBUILD_NUM_FDC=51 NGDBUILD_NUM_FDCE=44 NGDBUILD_NUM_FDE=133
NGDBUILD_NUM_FDP=104 NGDBUILD_NUM_FDR=229 NGDBUILD_NUM_FDRE=272 NGDBUILD_NUM_FDS=26
NGDBUILD_NUM_FDSE=1 NGDBUILD_NUM_GND=11 NGDBUILD_NUM_IBUF=1 NGDBUILD_NUM_IBUFG=1
NGDBUILD_NUM_INV=30 NGDBUILD_NUM_IOBUF=18 NGDBUILD_NUM_IOBUFDS=2 NGDBUILD_NUM_IODRP2=2
NGDBUILD_NUM_IODRP2_MCB=22 NGDBUILD_NUM_LDC=1 NGDBUILD_NUM_LUT1=172 NGDBUILD_NUM_LUT2=154
NGDBUILD_NUM_LUT3=124 NGDBUILD_NUM_LUT4=223 NGDBUILD_NUM_LUT5=178 NGDBUILD_NUM_LUT6=368
NGDBUILD_NUM_MCB=1 NGDBUILD_NUM_MULT_AND=7 NGDBUILD_NUM_MUXCY=184 NGDBUILD_NUM_MUXCY_L=86
NGDBUILD_NUM_MUXF7=15 NGDBUILD_NUM_MUXF8=2 NGDBUILD_NUM_OBUF=2 NGDBUILD_NUM_OBUFT=26
NGDBUILD_NUM_OBUFTDS=1 NGDBUILD_NUM_OSERDES2=47 NGDBUILD_NUM_PLL_ADV=1 NGDBUILD_NUM_PULLDOWN=2
NGDBUILD_NUM_PULLUP=2 NGDBUILD_NUM_RAMB16BWER=2 NGDBUILD_NUM_RAMB8BWER=1 NGDBUILD_NUM_SRL16=36
NGDBUILD_NUM_SRL16E=1 NGDBUILD_NUM_SRLC16E=32 NGDBUILD_NUM_SRLC32E=41 NGDBUILD_NUM_VCC=14
NGDBUILD_NUM_XORCY=221
NGDBUILD_POST_UNISIM_SUMMARY
NGDBUILD_NUM_BSCAN_SPARTAN6=1 NGDBUILD_NUM_BUFG=2 NGDBUILD_NUM_BUFGMUX=4 NGDBUILD_NUM_BUFPLL_MCB=1
NGDBUILD_NUM_FD=106 NGDBUILD_NUM_FDC=51 NGDBUILD_NUM_FDCE=44 NGDBUILD_NUM_FDE=133
NGDBUILD_NUM_FDP=104 NGDBUILD_NUM_FDR=229 NGDBUILD_NUM_FDRE=272 NGDBUILD_NUM_FDS=26
NGDBUILD_NUM_FDSE=1 NGDBUILD_NUM_GND=11 NGDBUILD_NUM_IBUF=19 NGDBUILD_NUM_IBUFDS=2
NGDBUILD_NUM_IBUFG=1 NGDBUILD_NUM_INV=30 NGDBUILD_NUM_IODRP2=2 NGDBUILD_NUM_IODRP2_MCB=22
NGDBUILD_NUM_LDC=1 NGDBUILD_NUM_LUT1=172 NGDBUILD_NUM_LUT2=154 NGDBUILD_NUM_LUT3=124
NGDBUILD_NUM_LUT4=223 NGDBUILD_NUM_LUT5=178 NGDBUILD_NUM_LUT6=368 NGDBUILD_NUM_MCB=1
NGDBUILD_NUM_MULT_AND=7 NGDBUILD_NUM_MUXCY=184 NGDBUILD_NUM_MUXCY_L=86 NGDBUILD_NUM_MUXF7=15
NGDBUILD_NUM_MUXF8=2 NGDBUILD_NUM_OBUF=2 NGDBUILD_NUM_OBUFT=44 NGDBUILD_NUM_OBUFTDS=3
NGDBUILD_NUM_OSERDES2=47 NGDBUILD_NUM_PLL_ADV=2 NGDBUILD_NUM_PULLDOWN=2 NGDBUILD_NUM_PULLUP=3
NGDBUILD_NUM_RAMB16BWER=2 NGDBUILD_NUM_RAMB8BWER=1 NGDBUILD_NUM_SRL16E=37 NGDBUILD_NUM_SRLC16E=32
NGDBUILD_NUM_SRLC32E=41 NGDBUILD_NUM_TS_TIMESPEC=1 NGDBUILD_NUM_VCC=14 NGDBUILD_NUM_XORCY=221
 
XST Command Line Options
XST_OPTION_SUMMARY
-ifn=<fname>.prj -ofn=<design_top> -ofmt=NGC -p=xc6slx16-2-ftg256
-top=<design_top> -opt_mode=Speed -opt_level=1 -power=NO
-iuc=NO -keep_hierarchy=No -netlist_hierarchy=As_Optimized -rtlview=Yes
-glob_opt=AllClockNets -read_cores=YES -write_timing_constraints=NO -cross_clock_analysis=NO
-bus_delimiter=<> -slice_utilization_ratio=100 -bram_utilization_ratio=100 -dsp_utilization_ratio=100
-reduce_control_sets=Auto -fsm_extract=YES -fsm_encoding=Auto -safe_implementation=No
-fsm_style=LUT -ram_extract=Yes -ram_style=Auto -rom_extract=Yes
-shreg_extract=YES -rom_style=Auto -auto_bram_packing=NO -resource_sharing=YES
-async_to_sync=NO -use_dsp48=Auto -iobuf=YES -max_fanout=100000
-bufg=16 -register_duplication=YES -register_balancing=No -optimize_primitives=NO
-use_clock_enable=Auto -use_sync_set=Auto -use_sync_reset=Auto -iob=Auto
-equivalent_register_removal=YES -slice_utilization_ratio_maxmargin=5